Reliability modeling in our group focuses on oxide and silicon-oxide interface-related issues in MOS transistor devices. Degradations observed during bias temperature instability (BTI) and hot carrier stress based on depassivation and passivation of oxide and interface traps and the transition between different trap states can be simulated.
Implemented models include a non-radiative multi-phonon (NMP) model for oxide traps, a 2-stage model which additionally incorporates interface traps, and a multi-vibrational excitation model (MVE) for interfaces used for hot-carrier degradation modeling. The models can either use continuously distributed traps, randomly placed discrete traps, or individually placed traps, for instance, based on results of process simulation or measurement data.
Energy levels and barriers are varied randomly for a more realistic representation of device structures.