Complementary Metal Oxide Semiconductor (CMOS) devices and fabrication techniques have enabled tremendous technological advancements in a short period of time. In recent decades transistor scaling has enabled us to fit into our pockets what would be considered a supercomputer a few decades ago. However, as we approach the physical limits of scaling, the question frequently asked is: What is the future of CMOS? Sustaining increased transistor densities along the path of Moore’s Law has become increasingly challenging with limited power budgets, interconnect bandwidths, and fabrication capabilities. In the last decade alone, transistors have undergone significant design makeovers; from planar transistors of 10 years ago, technological advancements have accelerated to today’s FinFETs, which hardly resemble their bulky ancestors. FinFETs could potentially take us to the 5-nm node, but what comes afterwards? From gate-all-around devices to single electron transistors and two-dimensional semiconductors, a torrent of research is being carried out in order to design the next transistor generation, engineer the optimal materials, improve the fabrication technology, and properly simulate future devices.
Table of Contents: