6.1.2.1 Reduction of the Gate Length

When L_G is reduced, f_T will increase, but a simultaneous and undesirable increase of the output conductance g₀ must be expected due to short channel effects such as increased real space transfer. In  Figure 6.14 the simulated parameter g₀ (at the bias point V_DS = 2 V, V_GS = 0.2 V) is shown as a function of L_G and compared to the experimental DC values of HEMTs A and B which differ only with respect to L_G but not in any other geometrical dimensions. The simulation is able to reproduce g₀ realistically.
 

As described in Section 5.3.1, the increase of g_{m ext} is only small when L_G is reduced. The capacitance C_GD is nearly independent of L_G. The gate-source capacitance C_GS is only partly dependent on L_G: fringe and other parasitic contributions are independent of L_G, only the part due to the gate contact area is length dependent. Therefore, the improvement of f_T which can be achieved by a reduction of L_G depends on the relative contribution of the parasitic (i. e. constant) part of the capacitance to the gate capacitance C_G.

In  Figure 6.15 the simulated f_T is shown along with the measured and deembedded f_T according to the procedure described in Section 3.2. Although only the simulation of HEMT A was fitted to the deembedded f_T also the f_T of HEMT B is simulated very well. The measured values in  Figure 6.15 (which are taken from HEMTs A and B) are even below the ones calculated with complete T-gate structure and passivation nitride due to the presence of parasitic pad capacitances as discussed before.
 

The dependence of f_T on L_G is shown in  Figure 6.15 for two examples: the theoretical limiting case of e_r = 0 where the contribution of parasitics is reduced to the inevitable fringe capacitances at the gate edge, and the case of the presence of a medium with e_r = 7 (a silicon nitride passivation layer, for instance) which fills the space between the T­gate overhang and the semiconductor surface in the manner sketched in  Figure 6.6. Figure 6.15 demonstrates clearly that the improvement of f_T achieved by a reduction of L_G depends strongly on the relative contribution of parasitic capacitive couplings to the total gate capacitance. The reduction of f_T in the presence of passivation layers has been experimentally observed by Wu et al. [78].

To obtain an f_T of 100 GHz, a fully passivated device of the general structure of HEMT A must be either supplied with a gate length below 100 nm, or the gate length is left as large as in HEMT B (240 nm) but no passivation is allowed at all. The case of an unpassivated device in air with e_r = 1 is close to the idealized case e_r = 0 plotted in  Figure 6.15. The two curves in the Figure are calculated under the assumption of a constant interface charge density which is certainly an idealization when the unpassivated case is considered.
 

• 6.1.2.2 Contributions to the Gate Capacitance
• 6.1.2.3 Reduction of the Recess Length
• 6.2 Power HEMT for 0.9/1.9 GHz and 40 GHz Applications
• 6.2.1 DC Characteristics
• 6.2.2 Dependence of Recess Geometry on the E-Field Distribution
• 6.2.3 RF Characteristics
• 6.2.3.1 Reduction of the Gate Length
• 6.2.3.2 Contributions to the Gate Capacitance
• 6.2.3.3 Dependence of C_G on Passivation Thickness
• 6.2.3.4 Dependence of C_G on T-gate Cross Section
• 6.3 Millimeter Wave HEMTs
• 6.3.1 DC Characteristics
• 6.3.1.1 Dependence on the Gate-to-Channel Separation
• 6.3.1.2 Dependence on the Gate Length
• 6.3.2 RF Performance
• 6.3.2.1 Dependence on the Gate Length
• 6.3.2.2 Contributions to the Gate Capacitance
• 6.3.2.3 Dependence of f_T on d_GC
• 6.3.2.4 Dependence of f_T and f_max on L_R
• 6.3.2.5 Dependence on the Passivation Thickness
• 6.3.3 Optimization of Millimeter Wave HEMTs
• 6.4 Comparison between Low Noise, Power, and Millimeter Wave HEMTs
• 6.5 Influence of Backside Doping on the C_G(V_GS) Characteristics