index

Abstract

Development of a physical HFET model: parameter extraction and verification

The aim of this work was to contribute to the development of a two-dimensional hydrodynamic simulator for heterostructure devices and to evaluate its potential of application for device development. Using powerful simulation programs, the development of microelectronic devices can be significantly enhanced and the expence of material and time for device development can be reduced.

Microelectronic devices from the field of III-V semiconductor compounds increasingly gain importance in the domain of high-frequency techniques. Field effect transistors based on AlxGa1-xAs/InyGa1-yAs/GaAs heterostructures have been established on the market as so-called Heterostructure Field Effect Transistors (HFET) and continue to be regarded as devices with a great future.

In order to extend the development of a device simulator physical models have been modified or extended and implemented in the simulation algorithm and model parameters have been extracted by the use of different one- and two-dimensional simulation programs. Furthermore, the applicability of a device simulator has been verified through direct comparison of simulation and measurement results within the scope of this work.

Beside the extension of the mobility model a generation-/recombination model has been integrated into the simulator to describe the dynamic charge transfer between the impurity levels and the conduction and valence bands, respectively. In this regard, the conventional model of SHOCKLEY, READ and HALL has been identified as a qualified basis which could be extended by taking into account the difference between lattice and carrier temperature to ensure the consistency with the hydrodynamic modelling. Using this approach, the particular importance of the material dependent concentration of the so-called DX centers could be demonstrated. In addition, it could been shown that surface states and deep impurities have a similar influence on the device properties.

Measurements of nominally identical devices on different positions on a wafer have shown additionally, that technological fluctuations lead to variations of the device parameters and consequently to fluctuations of the device characteristics. The comparison of capacitance measurements with one-dimensional simulations revealed that the gate-to-channel distance is an important parameter for the characteristics of the device. In general it could be established, that all parameters that have been influenced by etching can be used as fit parameters in order to adjust the simulation results to the measurement in the range of the manufacturing accuracy.

Most importantly, the device simulator could be extended by implementation of the mentioned physical models. As such, it is now a highly complex simulation program which shows an excellent agreement between simulation and measurement for simple heterostructure devices.