next up previous contents
Next: Appendix A Up: Dissertation Siddhartha Dhar Previous: 5.3 Device Simulation

6. Summary and Conclusions

Strained Si (SSi) is indispensable to achieve leading-edge transistor performance at the $ 65$ nm node and below [ITRS05]. Various technologies of introducing strain into Si channels were discussed ranging from conventional epitaxial growth of Si on SiGe to SGOI, SSOI, to stress from liners and capping layers.

The theoretical background behind the benefits of using strained Si was discussed. Using different strain configurations, it was shown how strain brings about a change in the energy levels of the different conduction band valleys. The shifts can be estimated using the deformation potential theory and $ {\bf {k\cdot p}}$ method for both electrons and holes. Additionally, in the presence of shear stress, the following salient features were identified for the conduction band: (a) a non-linear shift in the energy levels (b) distortion of the band close to the minima resulting in a change in the effective masses, and (c) movement of the band minima towards the X-points. All these effects can act collectively and result in enhanced carrier mobilities.

An overview of carrier mobility modeling for device simulation purpose was presented. New approaches of systematically modeling the low field and high-field electron mobilities in strained Siwere derived. A bulk low-field electron mobility model describing the anisotropy of the electron mobility in strained Si was developed. The model was extended to take into account the variation of the electron effective masses. It was demonstrated that the shear stress-induced modification of the effective masses cannot be neglected for calculating the mobility. The validity of the models was verified against analytical band Monte Carlo simulations for different orientations of the SiGe substrate, doping concentrations, and stress configuration in the strained layer. Full-band Monte Carlo simulations were performed to investigate the electron high-field transport in strained Si for different field directions. It was found that the standard analytical expression for capturing the velocity-field relation in unstrained Si was not sufficient to explain the peculiarities in strained Si. The simulation results were thus cast into a semi-empirical mobility model after careful considerations of the inherent complexities (see Section 5.2.1) associated with a physics-based modeling approach. The model was extended to arbitrary field directions using an interpolation technique. While the low-field model was developed for a generalized stress condition, the high-field model is applicable only to the technologically relevant biaxial stress condition and uniaxial stress applied along the high-symmetry directions.

All the models were developed with the intent of performing device simulation using TCAD tools and were implemented in the general purpose device simulator MINIMOS-NT. For calculating the inversion layer mobility in strained Si, a modified form of a standard inversion layer mobility model for unstrained Si was utilized. The strained mobility was estimated by assuming the same enhancement of the inversion layer mobility as in the bulk case. Although semi-empirical in nature, the model showed good agreement to the measured effective mobility in the unstrained and strained case. A more rigorous modeling of the inversion layer mobility in strained Si, taking into account the sub-band structure, could perhaps be too cumbersome for device simulation purposes. An interface was established to read in arbitrary stress distribution on the device structure into the simulator. This allows for simulation of an arbitrary stress distribution on the device structure. Lastly, a novel device structure, so called the dotFET, was investigated. Simulations show that the non-uniform strain distribution in the Si bridge delivers more than 30% improvement in the linear drain current and more than 10% improvement in the saturation drain current as compared to the unstrained case. The promising results on this novel device structure, however, need to be verified against experimental results wherein the values of the strain components might be lesser than that in the simulated structure due to strain relaxation from different processing steps.


next up previous contents
Next: Appendix A Up: Dissertation Siddhartha Dhar Previous: 5.3 Device Simulation

S. Dhar: Analytical Mobility Modeling for Strained Silicon-Based Devices