2.2.1 Channel

In the inversion layer of a MOSFET the strong band bending perpendicular to the channel leads to energy quantization. While the band edge energy along the channel varies only slightly, there is a strong gradient perpendicular to the channel. The inversion carriers are confined to a narrow quantum well beneath the gate dielectric which is called the two-dimensional electron gas. This is depicted in Fig. 2.5, where the carrier concentration in the channel is shown for a classical simulation with and without quantum correction.

Figure 2.5: Carrier concentration without (left) and with (right) quantum correction. In the classical case the concentration peaks at the interface.

If it is assumed that the carrier wave function is blocked at the gate dielectric -- that is, wave function penetration is neglected -- discrete energy levels are formed [16]. The maximum of the electron concentration, the charge centroid, is not located at the interface to the gate dielectric, but forms inside the channel as shown in the left part of Fig. 2.6. This effect manifests as a reduced output current, as shown in the right part of Fig. 2.6, and can be modeled to some extent as a threshold voltage shift. Furthermore, the gate capacitance is reduced by this effect.

Figure 2.6: Carrier concentration in the channel (left) and output characteristics of a MOSFET (right) calculated with and without quantum correction.

Additional problems of device scaling are related to hot-carrier effects: When carriers in a turned-on MOSFET move from the source to the drain, they gain velocity and energy. Near the drain they have a high temperature which causes increased band-to-band tunneling, gate dielectric tunneling, and impact ionization (the phenomenon of hot-carrier tunneling will be reissued in Section 5.1.4.) The additional carriers created by these processes add to the substrate current, and thus to the leakage of the device. Furthermore, the hot-electron tunneling current leads to a degradation of the reliability of the gate dielectric.

Punchthrough poses a severe problem for miniaturized devices. It happens when a spurious path between source and drain of a turned-off MOSFET forms in the bulk region where the gate has no control over the charge. This results in a strongly increased leakage current. Fig. 2.7 shows the current density in a 90nm turned-off MOSFET at $V_\mathrm{GS}$=0.0V, $V_\mathrm{DS}$=1.2V with a retrograde well (left) and without (right). Due to punchthrough, the current density in the right device is very high. It can be seen that the current does not flow through the channel but deeply in the substrate. Measures taken to reduce this effect are retrograde wells, halo implants, or pocket implants [17].

For devices with very short channels, an additional effect occurs which leads to increased leakage current. Due to the short distance between source and drain, the potential at the drain contact reduces the peak value of the energy barrier in the channel. This is shown in the left part of Fig. 2.8 for gate lengths of 250nm down to 50nm. It can be seen that the peak of the energy barrier near the source contact is strongly reduced, an effect which is called drain-induced barrier lowering (DIBL). It leads to a decrease of the threshold voltage with reduced channel length. The resulting values of the threshold voltage for decreasing channel lengths, as shown in the right part of Fig. 2.8, give the so called 'roll-off' curve.

Figure 2.7: Current density in a 90 nm turned-off MOSFET without (left) and with a retrograde well implant (right). In the right device punchthrough leads to a high leakage current which mainly flows in the bulk region.

Figure 2.8: DIBL (left) and roll-off curve (right) for MOSFET devices with decreasing gate lengths and dielectric thicknesses at a drain bias of 1.2 V.

A. Gehring: Simulation of Tunneling in Semiconductor Devices