2.2.2 Gate Stack

For the realization of CMOS circuits it is necessary to integrate nMOS and pMOS devices closely together. Polysilicon gates allow an adjustment of the work function by doping and are thus ideally suited for large-scale integration [18], in contrast to metals where it is difficult to find materials with complementary work functions. However, if a voltage is applied on the polysilicon gate, a depletion layer forms at the interface to the gate dielectric. Within this layer a voltage drop occurs which is approximately given by [19]

$\displaystyle \ensuremath{V_\mathrm{poly}}\approx \frac{\ensuremath{\kappa_\mat...
...th {\mathrm{q}}\ensuremath{\kappa_\mathrm{si}}\ensuremath {N_\mathrm{poly}}}\ ,$    

where $ \ensuremath{\kappa_\mathrm{diel}}$ and $ \ensuremath{\kappa_\mathrm{si}}$ denote the dielectric permittivity of the gate dielectric and the substrate, $ \ensuremath{E_\mathrm{diel}}$ is the electric field in the dielectric, and $ \ensuremath {N_\mathrm{poly}}$ the doping of the polysilicon. This effect is called polysilicon depletion. It leads to a reduced electron concentration at the interface and causes an effective increase of the dielectric thickness and an increase of the threshold voltage. The polysilicon depletion effect can be avoided by the use of metal gates such as nitrogen-doped molybdenum [20], which, however, is demanding from a process point of view.

Furthermore, polysilicon gates must be doped, and the material Boron is used as dopant for pMOS devices. However, during further process steps, the Boron tends to diffuse through the polysilicon gate and penetrate the dielectric layer and even the channel (Boron penetration) [21]. This causes a number of problems not only with the quality and reliability of the dielectric but especially with the device operation: Boron penetration increases the threshold voltage of MOS devices and degrades the MOSFET transconductance and its subthreshold slope.

A. Gehring: Simulation of Tunneling in Semiconductor Devices