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5.4.2 Source/Drain Implantation of an NMOS-Transistor

Fig. 5.26 shows the input structure for the ion implantation. It is one half of an NMOS-Transistor, which is cut through the gate. The crystalline silicon substrate is partly covered by a thick silicon dioxide layer forming the isolation and a thin silicon dioxide layer serving as the gate oxide and as a scattering oxide for the implantation. The gate is made of polysilicon which is also covered by a thin silicon dioxide layer.

Figure 5.26: Structure of an 0.6 $ \mu $m NMOS-transistor before an implantation of the source and the drain region.
\begin{figure}\begin{center}
\psfrag{Scattering Oxide}{\Large Scattering oxide}\...
...\includegraphics{fig/appli/SD-Implant/NMOS_Struct.eps}}}\end{center}\end{figure}

By this implantation a heavily n-type doped region is formed in the p-type substrate. Due to this counter doping, diodes are formed between the gate and the source area and the gate and the drain area. Thereby the source area is electrically isolated from the drain area because one of these diodes is always reverse biased and the transistor can only be made conductive by applying a voltage at the gate to inverse a thin layer below the gate.

The implantation is performed with arsenic ions with an energy of 90 keV and a dose of $ 4{\cdot }10^{15}$cm$ ^{-2}$. The ion beam is tilted by 7 $ \,^\circ\;$and rotated by 0 $ \,^\circ\;$ . An arsenic concentration of up to $ 3{\cdot}10^{22}$cm$ ^{-3}$ is introduced into the substrate by this implantation as shown in Fig. 5.27. To give an impression of the three-dimensional simulation result the arsenic distribution is show in three cuts through the source/drain region in common with an outline of the transistor structure.

Due to the high implantation dose a part of the active area becomes amorphous. As shown in Fig. 5.28, in the silicon substrate below the source/drain region a 10 nm thick amorphous layer is formed. During the following annealing step this amorphous layer is converted back to crystalline silicon. Worth mentioning is that the recrystallization process of amorphous zones is a faster process than the annealing process of isolated point defects in silicon. Therefore shorter annealing times can be used for the activation of the dopant atoms if amorphous layers are formed during implantation.

Like the arsenic distribution, the amorphous zones are visualized within three cuts through the source/drain region in Fig. 5.28. 1500000 distinct ions were simulated applying the Follow-Each-Recoil method. This simulation required about 40 hours of CPU-time on a DEC-600 workstation with 333 MHz CPU clock frequency.

Figure 5.27: Simulated arsenic distribution resulting from a source/drain implantation with arsenic ions with an energy of 90 keV and a dose of $ 4{\cdot }10^{15}$cm$ ^{-2}$. The figure shows three cuts through the source/drain region.
\begin{figure}\begin{center}
\psfrag{1e+21}{\tiny $1{\cdot}10^{21}$\mbox{cm$^{-3...
...degraphics{fig/appli/SD-Implant/NMOS_Arsenic_mod2.eps}}}\end{center}\end{figure}

Figure 5.28: Simulated amorphization of the source/drain region of a 0.6 $ \mu m$ NMOS-transistor by a source/drain implantation with arsenic ions with an energy of 90 keV and a dose of $ 4{\cdot }10^{15}$cm$ ^{-2}$. The figure shows three cuts through the source/drain region. The light gray area denotes the amorphous region.
\begin{figure}\begin{center}
\resizebox{0.98\linewidth}{!}{\rotatebox{0}{\includegraphics{fig/appli/SD-Implant/SD-Impl_mod.ps}}}\end{center}\end{figure}

previous up next contents Previous: 5.4.1 Threshold Voltage Adjust Up: 5.4 Implantation into Topological Next: 6. Conclusion and Outlook


A. Hoessiger: Simulation of Ion Implantation for ULSI Technology