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2.2 Design

As mentioned above the integration between design of integrated circuits and their simulation is already very efficient. The circuit design is almost exclusively performed at workstations by using a sophisticated set of software tools to model the behaviour of the schematic to be implemented as integrated circuit on silicon wafers. To enable a high degree of modeling accuracy an extensive set of characterization of the available devices on silicon has to be done in advance. This task is called process and device characterization (PDC). It will be shown in Chapter 4 how TCAD may support this task especially for the development of new process technologies. PDC is generating the model parameters for the SPICE models used by circuit designers. The consistency and accuracy of these SPICE models is absolutely mandatory for enabling designs with the envisaged electrical specifications. The generation of the SPICE models is carried out after the semiconductor process freeze during development of new process flows or occasionally, if some major semiconductor process change occurred. To reflect shifts or drifts in the semiconductor device performance as well as the statistical variations of the process technology a feedback loop is established between electrical test and the SPICE models. This feedback is implemented by using the pass/fail limits of the electrical test to supply worst/case conditions to the designer. There are numerous new approaches for simulating statistical fabrication fluctuations within the ECAD environment labeled under the term DFM (design for manufacturability) [24],[25], however, the details are outside of the scope of this work. By using SPICE models, EDA (Electronic Design Automation) design tools from companies like Mentor [26], Cadence [27], or Agilent [28] are able to simulate the behaviour of the schematic entered by hand or imported with net lists. A typical design flow is shown in Figure 2.3.
Figure 2.3: Design flow of a mixed-signal design, comprising of an analog and a digital part

\includegraphics[angle=0,origin=c,height=0.80\textheight,clip=true]{figures/Design_Flow.ps}


next up previous contents
Next: 2.3 Layout Up: 2. The Processing Chain Previous: 2.1 Overview

R. Minixhofer: Integrating Technology Simulation into the Semiconductor Manufacturing Environment