next up previous contents
Next: 4.5.2 Process Simulation Up: 4.5 Simulation of Polysilicon Previous: 4.5 Simulation of Polysilicon

4.5.1 Device Fabrication

The device under investigation is a Double Base Silicon Bipolar Junction Transistor epitaxially grown by a Chemical Vapor Deposition (CVD) process. An n-well (Arsenic), similar to the implanted one used in the standard CMOS technology, is grown during the epitaxial process. The buried layer (Antimony) is connected to a sinker (Phosphorus) to conduct the electron current from the buried layer to the collector contact.

The base consists of an intrinsic base (below the emitter window, Boron-doped) and the extrinsic base (highly Boron-doped under the base contact).

The emitter-base junction is formed by a diffusion process of a polysilicon layer which is placed on the p-doped base under the emitter window. After implantation of Arsenic, a diffusion process pushes the Arsenic into the p-doped base, thus forming the emitter-base junction.



Vassil Palankovski
2001-02-28