1 Motivation and Objectives

The objective of this work is the development of an efficient method for the simulation of electromagnetic emission from complex printed circuit boards, which are parallel to a metallic plane at an electrically short distance.

Arrangements of printed circuit boards parallel to a metallic cover plane are used in various applications. Some examples are automotive control devices, mobile devices, parallel stacked PCBs in rack applications, PCBs parallel to a cooling device, computer motherboards mounted parallel to an enclosure plane, CD/DVD and hard disk drives. Figure 1.1 and Figure 1.2 illustrate the arrangements of PCBs parallel to a metallic enclosure or parallel to a PCB ground plane for some example applications.

(a) Motor control device.

(b) Car audio device.

Figure 1.1:Automotive applications with a PCB parallel to metallic enclosure planes [1].

(a) Cell phone.

(b) Rack mounted parallel PCB stack.

Figure 1.2: Mobile and industrial applications with parallel stacked PCBs [1].

The main challenges for the electromagnetic emission simulation of such devices are handling their complexity, and covering a broad frequency band from the kHz up to the GHz range. Frequency ranges of some emission standards are listed in Table 1.1.

Table 1.1: European and international standards and regulations for some device classes [2].

Subject	Euro Norm	CISPR/IEC	Frequency Range
Sound and television broadcast receivers - Radio disturbance characteristics - Limits and methods of measurement.	EN 55013	CISPR 13	9 kHz to 400 MHz
Limits and methods of measurement of radio disturbance characteristics of electrical motor-operated and thermal appliances for household and similar purposes.	EN 55014	CISPR 14	9 kHz to 400 MHz
Information technology equipment - Radio disturbance characteristics - Limits and methods of measurement.	EN 55022	CISPR 22	9 kHz to 400 MHz
Radio disturbance characteristics for the protection of receivers used on board vehicles, boats and on devices - Limits and methods of measurement.	EN 55025	CISPR 25	150 kHz to 2.5 MHz

The following list of technical facts from a typical automotive control device, of the BOSCH MED17 generation, gives a perception of the complexity.

• Number of active and passive components: 598
• Number of integrated circuits: 18
• Number of connector pins: 181
• Number of power stages with I>1A: 37
• Microcontroller (32bit) clock rate: 150 MHz
• Bus interfaces:
  • 3 CAN at clock rate: 2 MHz
  • Peripheral ms-bus at clock rate: 10 MHz
  • Flexray bus at clock rate: 10 MHz
  • 2 SPI interfaces at clock rate: 2 MHz
  • 2 LIN interfaces at clock rate: 2 MHz
• Number of PCB layers: 6
• Minimum trace width: 125 mm
• PCB board size: 160 mm x 190 mm

In addition to this complex device internal structure, a quantitative electromagnetic emission simulation has to consider external appliances which are connected to the control device by a cable harness. Although mobile devices are smaller, the integration density in the package is much higher. Usually industrial and computer PCBs are also very dense, sizeable, and are operated at even higher clock rates. Therefore, the complexity is a challenge for the EMC simulation in nearly every application. The complexity will further increase, because the strong demand of rising functionality leads to more density and higher clock rates in the future. Figure 1.3 from [3] depicts a forecast on microprocessor and microcontroller clock rates and emission requirements until 2020. The content of Figure 1.3(a) is based on data from ITRS [4], which sets industry and technology milestones for the next 15 years. By 2020 processors are imaginable to run at about 25GHz. By 2016 the ITRS road map projects the minimum physical gate length of transistors to be close to 9nm, which is considered by most researchers to be kind of the physical limit of silicon. The saturation scenario considers several limiting factors for frequency increase, such as, for example, MOS mobility degradation and interconnect delay. In fact, there is a five year gap between microprocessor development and microcontroller development regarding density and clock rates. This enables a further MOS technology based performance enhancement of microcontrollers beyond 2020. According to [4], functional diversification by integration of analog, RF, power, and passive functions provides additional opportunities beyond scaling in order to increase device performance.
The described complexity increase of microcontrollers provides an impression of the future complexity increase of electronic devices, because nearly every electronic device will be based on a processor or controller. The increased controller performance and functionality will lead to enhanced peripherals and busses, more connector pins, more device interfaces, and denser enclosure designs.

Figure 1.3(b) depicts the evolution of the RF emissions from ICs [3]. There is a strong IC customer pressure for achieving low emissions. IC designs without EMC optimization suffer from high RF emissions and require expensive on board decoupling and filtering. Therefore, EMC concerns have increased in importance. Within the last 10 years low emission and high immunity to interference have emerged as the key differentiators of overall IC performances. A 20dB emission reduction could be achieved by design guidelines and new EMC knowledge in 2000. EMC optimization will lead to a further emission reduction of about 40dB in 2020. Examples have already been presented [5]. However, the technology trend towards more density and higher clock rates leads to higher emissions. Thus, a gap is expected to remain between the customer demand and the emission level of the devices. To meet the customer requirements, low emission design guidelines and simulation based design techniques for SoC and SiP have to be enhanced and generalized.

(a) Core frequency increase until 2020.

(b) Maximum emission level.

Figure 1.3: Increase in IC complexity, clock rates, and emission requirements [3].

Every electronic device must be compliant to dedicated EMC requirement regulations. Table 1.1 lists some important standards for specific classes of devices. A new device is tested to be EMC compliant at the end of the development cycle on final prototype devices. The failure of this test necessitates a costly redesign and increases the time taken to market the product. Figure 1.4 depicts costs of change, adaptability and optimized quality assurance investment over the life cycle of typical large-scale series fabrication products in a qualitative diagram.

Figure 1.4: Cost of change, Adaptability, and Optimized quality assurance investment over product life cycle. Qualitative diagram for typical large-scale series fabrication products.

Time

In the definition, specification, and predesign phase of the product life cycle, adaptability is at a maximum, when costs of change are at their lowest. The uncertainties of the functional device definition, which is not finalized in the very early stage, inhibit accurate quantitative simulations of the final device. However, with progressing product definition, the quality assurance investment must increase to benefit from high adaptability at low costs. Most predesign definitions can scarcely be changed in the later design process and have a significant influence on the attainable quality performance. Conceptual simulations in the predesign phase powerfully support design decisions in the functional product definition process.
The required quality performance of a product must be reached in the design phase to achieve 100% first pass yield. The 100% yield is necessary to enable the supplier of a product to omit rework phases in the project road map, without any failure risk on agreed customer deadlines. Only simulation provides the opportunity to make performance predictions and optimizations as long as no prototype is available. There must not remain any open quality issues, when a product has been finalized and series fabrication has started.
The main motivation of electromagnetic emission simulation is to ensure the EMC compliance in the design phase of a new device, in order to avoid redesign costs and time delays. However, the simulation methods must be very efficient to enable simulation based CAD of EMC properties within short, time optimized product development cycles. The objective of this work is to develop efficient methods by using analytical and semi-analytical methods, domain decomposition, and methods with an explicit assignment to source and coupling path. This enables fast conceptual simulations in the predesign phase and swift product quality performance optimization in the design phase.

C. Poschalko: The Simulation of Emission from Printed Circuit Boards under a Metallic Cover