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1.3.2 Equipment Simulation

Manufacturing equipment for plasma etching and deposition techniques has grown from simple and inexpensive diode parallel-plate configurations to million dollar modular chambers with multiple frequency generators, electrostatic chucks, externally controlled wall temperatures, and a variety of process-control sensors designed specially for one type of film.

Front end processing is largely driven by decreasing CDs achieved with directional etching steps. The most challenging requirements are maintaining low CD bias and high CD uniformity at continually larger wafer diameters. Driving force for new developments are higher directionality needed for smaller features going along with the need for improved selectivity and higher rates for a higher throughput. Recent developments tend towards low-pressure, medium- and high-density plasmas (HDP) with separate radio frequency (RF) power sources for plasma generation and wafer biasing. High-density sources allow the wafer platen to be powered independently of the source, providing significant decoupling between directionality determined by the ion energy (wafer bias) and the etch rate set by the ion flux (plasma density primarily driven by source power) [3]. Such techniques are realized in state-of-the-art plasma processes such as magnetically enhanced reactive ion etching (MERIE), inductively coupled plasmas (ICP), and dipole rotating magnet (DRM) reactors.

A different situation is given for interconnect dielectric deposition. The challenge here is to fill sub-half-micron-gaps without voids [8]. If possible, thermal low-pressure chemical vapor deposition (LPCVD) is avoided with respect to the thermal budget of the wafer and has to be replaced with alternative techniques like plasma-enhanced (PE) CVD. This in turn needs special control of the film conformality provided by ``bottom-up'' deposition with HDP CVD. Interconnect metals predominantly deposited with sputtering techniques for barrier and nucleation layers, e.g., ${\rm Ti}$ and ${\rm TiN}$, and high-pressure (HP) CVD techniques as for ${\rm W}$ also are affiliated with uniformity control for the sputtering particle distributions across the wafer.

These considerations highlight why equipment simulation is becoming indispensable for guaranteeing the uniformity of plasma characteristics and particle distributions across the wafer. Equipment simulation should preferably address the feedback of patterning of the wafer on the plasma conditions. Approximate methods that address pattern dependences directly from the layout are needed. Moreover, investigations on equipment level assisted by chemical software also help in finding possible reaction pathways and in determining the most important ones.

It is beyond the scope of this thesis to cover also simulation and modeling on reactor scale, especially because reactor scale simulators dealing with different types of mass transport on non-moving grids are available on academic base, e.g., hybrid plasma equipment model HPEM [25], and commercially, like FLUENT1, CFDRC2, and SIMSPUD3. Nevertheless the thesis devotes special sections to the link of the presented feature scale profile evolution with equipment simulation.



Footnotes

... FLUENT1
See http://www.fluent.com/.
... CFDRC2
See http://www.cfdrc.com/.
... SIMSPUD3
See http://www.reactiondesign.com/ps_simbad.html.
previous up next contents
Prev: 1.3.1 Motivation Up: 1.3 Topography Simulation Next: 1.4 Outline of the

W. Pyka: Feature Scale Modeling for Etching and Deposition Processes in Semiconductor Manufacturing