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T. Simlinger, H. Kosina, M. Rottinger, and S. Selberherr, ``MINIMOS-NT: A Generic Simulator for Complex Semiconductor Devices,'' in ESSDERC'95 - 25th European Solid State Device Research Conference (H. de Graaff and H. van Kranenburg, eds.), (Gif-sur-Yvette Cedex, France), pp. 83-86, Editions Frontieres, 1995.

T. Binder, K. Dragosits, T. Grasser, R. Klima, M. Knaipp, H. Kosina, R. Mlekus, V. Palankovski, M. Rottinger, G. Schrom, S. Selberherr, and M. Stockinger, MINIMOS-NT User's Guide.
Institut für Mikroelektronik, 1998.

T. Grasser, Mixed-Mode Device Simulation.
Dissertation, Technische Universität Wien, 1999.

G. Moore, ``Cramming More Components onto Integrated Circuits,'' Electronics, pp. 114-117, Apr. 1965.

Semiconductor Industry Association, ``The National Technology Roadmap for Semiconductors,'' 1997.

S. Sze, ed., VLSI Technology.
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W. Vandervorst and T. Clarysse, ``On the Determination of Dopant/Carrier Distributions,'' J.Vac.Sci.Technol.B, vol. 10, no. 1, pp. 302-315, 1992.

R. Kleimann, M. O'Malley, F. Baumann, J. Garno, and G. Timp, ``Junction Delineation of 0.15$ \mu$m MOS Devices Using Scanning Capacitance Microscopy,'' in Int.Electron Devices Meeting, pp. 691-694, 1997.

N. Khalil and J. Faricelli, ``MOSFET Two-Dimensional Doping Profile Determination,'' in Simulation of Semiconductor Devices and Processes (S. Selberherr, H. Stippel, and E. Strasser, eds.), vol. 5, (Wien), pp. 365-368, Springer, 1993.

W. Werner, H. Lakatha, H. Smith, L. LeTarte, V. Ambrose, and J. Baker, ``Auger Voltage Contrast Imaging for the Delineation of Two-Dimensional Junctions in Cross-Sectioned Metal-Oxide-Semiconductor Devices,'' J.Vac.Sci.Technol.B, vol. 16, no. 1, pp. 420-425, 1998.

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W. Werner, ``On the Quantification of Dopant Concentration with the VCSEM,'' DEC internal report, 1995.

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H. Wagner, A. Pfeiffer, C. Schiebl, and W. Werner, ``Monte Carlo Simulation of Electron Scattering for Arbitrary 2D Structures Using a Modified Quadtree Geometry Discretization,'' Microchim. Acta, vol. 13, p. 533, 1995.

N. Khalil, J. Faricelli, D. Bell, and S. Selberherr, ``The Extraction of Two-Dimensional MOS Transistor Doping via Inverse Modeling,'' IEEE Electron Device Lett., vol. 16, no. 1, pp. 17-19, 1995.

M. Grupen, K. Hess, and G. Song, ``Simulation of Transport over Heterojunctions,'' in Simulation of Semiconductor Devices and Processes (W. Fichtner and D. Aemmer, eds.), vol. 4, (Konstanz), pp. 303-310, Hartung-Gorre, 1991.

S. Mottet and J. Viallet, ``Thermionic Emission in Heterojunctions,'' in Simulation of Semiconductor Devices and Processes (G. Baccarani and M. Rudan, eds.), vol. 3, (Bologna), pp. 97-108, Tecnoprint, 1988.

C. Wu and E. Yang, ``Carrier Transport Across Heterojunction Interfaces,'' Solid-State Electron., vol. 22, pp. 241-248, 1979.

K. Yang, J. East, and G. Haddad, ``Numerical Modeling of Abrupt Heterojunctions Using a Thermionic-Field Emission Boundary Condition,'' Solid-State Electron., vol. 36, no. 3, pp. 321-330, 1993.

C. Fischer, Bauelementsimulation in einer computergestützten Entwurfsumgebung.
Dissertation, Technische Universität Wien, 1994.

R. Mlekus and S. Selberherr, ``Object-Oriented Algorithm and Model Management,'' in IASTED Int. Conf. on Applied Modelling and Simulation, (Honolulu, Hawaii, USA), pp. 437-441, Aug. 1998.

T. Simlinger, Simulation von Heterostruktur-Feldeffekttransistoren.
Dissertation, Technische Universität Wien, 1996.

G. Golub and C. Van Loan, Matrix Computations.
John Hopkins University Press, second ed., 1989.

R. Varga, Matrix Iterative Analysis.
Prentice-Hall, 1962.

D. Schroeder, Modelling of Interface Carrier Transport for Device Simulation.
Springer, 1994.

A. Grinberg, M. Shur, R. Fischer, and H. Morkoç, ``An Investigation of the Effect of Graded Layers and Tunneling on the Performance of AlGaAs/GaAs Heterojunction Bipolar Transistors,'' IEEE Trans.Electron Devices, vol. ED-31, no. 12, pp. 1758-1765, 1984.

J. Jones, G. Tait, S. Jones, and D. Katzer, ``DC and Large-Signal Time-Dependent Electron Transport in Heterostructure Devices: An Investigation of the Heterostructure Barrier Varactor,'' IEEE Trans.Electron Devices, vol. 42, no. 8, pp. 1393-1403, 1995.

T. Simlinger, H. Brech, T. Grave, and S. Selberherr, ``Simulation of Submicron Double-Heterojunction High Electron Mobility Transistors with MINIMOS-NT,'' IEEE Trans.Electron Devices, vol. 44, no. 5, pp. 700-707, 1997.

C. Smith and S. Chamberlain, ``Theory and Design Methodology for an Optimum Single-Phase CCD,'' IEEE Trans.Electron Devices, vol. 39, no. 4, pp. 864-873, 1992.

N. Ula, G. Cooper, J. Davidson, S. Swierkowski, and C. Hunt, ``Optimization of Thin-Film Resistive-Gate and Capacitive-Gate GaAs Charge-Coupled Devices,'' IEEE Trans.Electron Devices, vol. 39, no. 5, pp. 1032-1040, 1992.

M. Rottinger, T. Simlinger, and S. Selberherr, ``Two-Dimensional Transient Simulation of Charge-Coupled Devices Using MINIMOS NT,'' in Simulation of Semiconductor Devices and Processes (H. Ryssel and P. Pichler, eds.), vol. 6, (Wien), pp. 440-443, Springer, 1995.

W. Kosonoky and D. Sauer, ``The ABCs of CCDs,'' in Charge-Coupled Devices: Technology and Applications (R. Melen and D. Buss, eds.), pp. 2-7, New York, USA: IEEE PRESS, 1977.

M. Morimoto, K. Orihara, N. Mutoh, A. Toyoda, M. Ohbo, Y. Kawakami, T. Nakano, K. Chiba, S. Kawai, K. Hatano, K. Arai, M. Nishimura, Y. Nakashiba, A. Kohno, I. Akiyama, N. Teranishi, and Y. Hokari, ``A 1-Inch 2-M Pixel HDTV CCD Image Sensor with Tungsten Photo-Shield and H-CCD Shunt Wiring,'' IEEE Trans.Electron Devices, vol. 42, no. 1, pp. 50-57, 1995.

W. Joppich and S. Mijalkovic, Multigrid Methods for Process Simulation.
Wien: Springer, 1993.

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C. Pichler and S. Selberherr, ``Rapid Semiconductor Process Design within the VISTA Framework: Integration of Simulation Tools,'' in Proceedings of the IASTED International Conference (M. Hamza, ed.), Modelling and Simulation, (Pittsburgh, PA, USA), pp. 147-150, The International Association of Science and Technology for Development, 1993.

C. Pichler, R. Plasun, R. Strasser, and S. Selberherr, ``High-Level TCAD Task Representation and Automation,'' IEEE J.Technology Computer Aided Design, May 1997.

R. Plasun, M. Stockinger, and S. Selberherr, ``Integrated Optimization Capabilities in the VISTA Technology CAD Framework,'' IEEE Trans.Computer-Aided Design of Integrated Circuits and Systems, vol. 17, no. 12, pp. 1244-1251, 1998.

G. Box and N. Draper, Empirical Model-Building and Response Surfaces.
Wiley, 1987.

R. Strasser, Rigorous TCAD Investigations on Semiconductor Fabrication Technology.
Dissertation, Technische Universität Wien, 1999.

J. Hyman, ``Accurate Monotonicity Preserving Cubic Interpolation,'' SIAM J.Sci.Stat.Comput., vol. 4, no. 4, pp. 645-654, 1983.

H. Akima, ``Algorithm 760: Rectangular-Grid-Data Surface Fitting that Has the Accurancy of a Bicubic Polynomial,'' ACM Trans.Mathematical Software, vol. 22, no. 3, pp. 357-361, 1996.

H. Akima, ``Algorithm 761: Scattered-Data Surface Fitting that Has the Accuracy of a Cubic Polynomial,'' ACM Trans.Mathematical Software, vol. 22, no. 3, pp. 362-371, 1996.

G. Massobrio and P. Antognetti, Semiconductor Device Modeling with Spice.
McGraw-Hill, second ed., 1993.

Martin Rottinger