5.1.1 TSV Design and Simulation Parameters

A schematic overview of the 3D integrated technology using a TSV including the front side rerouting layer and the back side redistribution layer (RDL) is shown in (5.1).

Figure 5.1: Diagonal cut-through profile view of the analyzed open copper TSV structure. The upper part of the interconnect layout is known as TSV top while the lower side is the TSV bottom. The TSV aspect ratio is 2.5:1 (TSV height / TSV diameter). The zoomed-in detail view of the TSV bottom depicts the front side layers stack. The arrow shows the direction of the electron flow.
tsvchap5

In general, the upper part of the structure is referred to as the TSV top while the lower part is the TSV bottom. It is normally considered that the TSV top is where the TSV comes out to the back side thick copper RDL, and the TSV bottom is the part of the TSV in contact with the front side rerouting layer. The TSV aspect ratio considered in our study is 2.5:1 (TSV height / TSV diameter). The TSV top is opened with a silicon etch process, followed by the deposition of a silicon dioxide insulation layer. The subsequent barrier layer (titanium nitride), metallization (copper) and passivation (silicon nitride) are deposited on the TSV surfaces using electrodeposition and PECVD (plasma enhanced chemical vapor deposition), respectively. Below the TSV (see the zoomed-in detail view in (5.1)) the front side layers stack (TiN/Cu/SiO2) is formed. In turn, on the top, the copper backside RDL is placed and passivated. The back side RDL will by convention be the side on which a solder bump is mounted to connect the other wafers.

The set of materials parameters, used by the models discussed in Chapter 3, are presented in table 5.1 and table 5.2 and are chosen from recent literature. Since the electromigration phenomenon occurs in the conducting lines and copper has higher sensitivity to electromigration, when compared to other conductors used in the given TSV structure, the parameters related to vacancy dynamics and the void evolution models are listed only for copper.

Table 5.1: Materials parameters for the electro-thermal and solid mechanics models [40, 38].
Model Parameter Cu SiN SiO2 Si TiN
Electro-thermal σe,0 [S m-1] 5.35 107 0 0 6.67 2.91 105
  kt,0 [W (m K)-1] 379 20 1.4 130 -
  αe [K-1] 4.3 10-3 0 - - -
  αt [K-1] 0 0 - - -
  βe [K-2] 0 0 - - -
  βt [K-2] 0 0 - - -
  ρm [Kg m-3] 8920 3100 2200 2200 5430
  cp [J (Kg K)-1] 385 700 730 700 601.71
Solid Mechanics E [GPa] 130 120 72 170 600
  ν 0.35 0.24 0.18 0.28 0.25
  αth [10-6 K-1] 16.5 2 0.55 2.6 0

Table 5.2: Materials parameters for the vacancy dynamics and diffuse interface models [40].
Model Parameter Cu
Vacancy Dynamics Dv,0 [cm2 s-1] 0.52
  Ea [eV] 0.89
  Z* -5
  Q* [J] 1.2 10-20
  f 0.4
  Ωa [cm3] 0
  Cv,0 [cm-3] 1 1016
  τv [s] 1
Diffuse Interface γs [N/m] 1.65
  εdi [m] 2 10-9
  Ds [cm2 s-1] 0.52 105
  δs [m] 2 10-9

Once the geometry has been imported into the FEM simulator and meshed, the simulation procedure described in Section 4.3.2 is applied to the open copper TSV structure in order to analyze the electromigration failure mechanism. The operating conditions for electromigration simulations are set by imposing boundary conditions over appropriate regions of the studied geometry. All external surfaces of the structure are assumed to be under isothermal conditions (T0=473K). The outer materials surrounding the copper lines are taken to be rigid while the inner surface of the TSV (silicon nitride layer) is free to move. For the electrical loading, the left side of the copper at the TSV top is maintained at a current density of j0=1MA/cm2 and the right side of the copper rerouting layer under the TSV bottom is set as the ground contact.

The final goals of the analysis are to estimate the interconnect lifetime and determine the most dominant mode of failure in the open TSV by extrapolating the current density exponent n from equation (1.2). For this purpose, the analysis requires data from several simulations of the interconnect structure at different current density conditions.




M. Rovitto: Electromigration Reliability Issue in Interconnects for Three-Dimensional Integration Technologies