3.1.1 Determining Delay Time

The usual definition of the delay time of a stage in a digital circuit is the time difference between the 50% points of the input and output waveforms [5,87]. This definition should be used with care because the result depends on the input waveform and on the output load and may in some cases be even negative. Therefore, the input waveforms should be chosen similar to those expected in the actual circuit operation.

Figure 3.1: Ring oscillator

This is done with a so-called ring oscillator, i.e., a series connection of an odd number n of stages with the output of the last stage fed back to the input of the first stage as shown in Fig. 3.1. This circuit will oscillate at a frequency $f = 1/(2n\ensuremath{t_{\mathit{d}}}\xspace )$ so that the stage delay can be determined as

$$\ensuremath{t_{\mathit{d}}}\xspace = \frac{1}{2nf} .$$ (3.1)

The number of stages must be sufficiently large so that node voltages can settle after the rising and falling edges. In the case of non-inverting stages an inverter with comparable $\ensuremath{W}\xspace /\ensuremath{L}\xspace$ must be inserted to ensure proper operation. The stage delay is then

$$\ensuremath{t_{\mathit{d}}}\xspace = \frac{1}{2nf} - \frac{\ensuremath{t_{\mathit{i}}}\xspace }{n} ,$$ (3.2)

where $\ensuremath{t_{\mathit{i}}}\xspace$ is the inverter delay. This method is suitable for measurements and for circuit simulation. An alternative to ring oscillators is to analyze a series of about four stages, where the input waveform is adjusted by the first stages [36].

Figure 3.2: Simple method to determine the delay time ( $C_{\mathit{L}} = C_{\mathit{in}}+C_{\mathit{out}}+2C_{\mathit{m}}$)

A simple way to obtain the delay time by simulation is to model the active devices as controlled current sources with one lumped load capacitance at the output. In this case a delay element can be used to complete a ring oscillator as shown in Fig. 3.2 which can be analyzed by simple transient simulation (an implementation of this method used a precursor of the model developed in Section 4.3 [62]). The delay time is then

$$\ensuremath{t_{\mathit{d}}}\xspace = \frac{1/f-2T}{2} .$$ (3.3)