In addition to combinatorial logic some sort of storage is required for a digital circuit to keep its internal state. Static data storage is accomplished with bi-stable circuits. A.2 Figures A.11 and A.12 show two basic digital static storage elements, the latch and the register or so-called D-flip-flop (the inverters to generate the complement of the clk signals are not shown). The latch is transparent for the data D during the clock-high period, whereas the register actually samples the data at the rising edge of the clk signal. Another example of a static storage element is the RS (reset-set) flip-flop shown in Fig. 4.11. Both latches and registers are used to implement synchronous digital systems (cf. Section A.3).
In dynamic circuits (cf. Section A.2.3.2) data storage
is achieved by means of the parasitic capacitances, which retain the
charge and thereby the voltage of a node which is in a high-Z state.
The advantage of such dynamic latches is their simplicity and higher
speed (because of the fewer transistors required). However, the data
are retained only for a short time which is determined by the leakage
current
of the transistors connected to the storage node.
A more detailed discussion of dynamic latches, especially, in the
view of high-performance low-power applications is given in
[41,75]
Memories for storing larger amounts of data require a somewhat different circuit technique to minimize the number of transistors per bit (one transistor in the case of DRAMs and 4-6 for SRAMs) and to support the addressing of the data. An extensive description of standard memory technologies can be found in [57].
