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Publications Andreas Gehring

85 records

Publications in Scientific Journals

21.  M. Karner, A. Gehring, S. Holzer, M. Pourfath, M. Wagner, W. Gös, M. Vasicek, O. Baumgartner, Ch. Kernstock, K. Schnass, G. Zeiler, T. Grasser, H. Kosina, S. Selberherr:
"A Multi-Purpose Schrödinger-Poisson Solver for TCAD Applications";
Journal of Computational Electronics, 6 (2007), 1-3; 179 - 182. https://doi.org/10.1007/s10825-006-0077-7

20.  M. Karner, A. Gehring, M. Wagner, R. Entner, S. Holzer, W. Gös, M. Vasicek, T. Grasser, H. Kosina, S. Selberherr:
"VSP - A Gate Stack Analyzer";
Microelectronics Reliability, 47 (2007), 4-5; 704 - 708. https://doi.org/10.1016/j.microrel.2007.01.059

19.  M. Karner, A. Gehring, H. Kosina:
"Efficient Calculation of Lifetime Based Direct Tunneling Through Stacked Dielectrics";
Journal of Computational Electronics, 5 (2006), 161 - 165. https://doi.org/10.1007/s10825-006-8837-y

18.  A. Gehring, S. Selberherr:
"Gate Current Modeling for MOSFETs";
Journal of Computational and Theoretical Nanoscience (invited), 2 (2005), 1; 26 - 44. https://doi.org/10.1166/jctn.2005.002

17.  L.C. Castro, D.L. John, D.L. Pulfrey, M. Pourfath, A. Gehring, H. Kosina:
"Method for Predicting fT for Carbon Nanotube FETs";
IEEE Transactions on Nanotechnology, Vol. 4 (2005), 6; 699 - 704. https://doi.org/10.1109/TNANO.2005.858603

16.  M. Pourfath, E. Ungersböck, A. Gehring, H. Kosina, S. Selberherr, W.J. Park, B.-H. Cheong:
"Numerical Analysis of Coaxial Double Gate Schottky Barrier Carbon Nanotube Field Effect Transistors";
Journal of Computational Electronics, 4 (2005), 1-2; 75 - 78. https://doi.org/10.1007/s10825-005-7111-z

15.  M. Pourfath, E. Ungersböck, A. Gehring, B.-H. Cheong, W.J. Park, H. Kosina, S. Selberherr:
"Optimization of Schottky Barrier Carbon Nanotube Field Effect Transistors";
Microelectronic Engineering, 81 (2005), 2-4; 428 - 433. https://doi.org/10.1016/j.mee.2005.03.043

14.  E. Ungersböck, M. Pourfath, H. Kosina, A. Gehring, B.-H. Cheong, W.J. Park, S. Selberherr:
"Optimization of Single-Gate Carbon-Nanotube Field-Effect Transistors";
IEEE Transactions on Nanotechnology, 4 (2005), 5; 533 - 538. https://doi.org/10.1109/TNANO.2005.851402

13.  V. Sverdlov, A. Gehring, H. Kosina, S. Selberherr:
"Quantum Transport in Ultra-Scaled Double-Gate MOSFETs: A Wigner Function-Based Monte Carlo Approach";
Solid-State Electronics, 49 (2005), 9; 1510 - 1515. https://doi.org/10.1016/j.sse.2005.07.013

12.  M. Pourfath, A. Gehring, E. Ungersböck, H. Kosina, S. Selberherr, B.-H. Cheong, W. Park:
"Separated Carrier Injection Control in Carbon Nanotube Field-Effect Transistors";
Journal of Applied Physics, 97 (2005), 10; 106103-1 - 106103-3. https://doi.org/10.1063/1.1897491

11.  A. Gehring, H. Kosina:
"Wigner Function-Based Simulation of Quantum Transport in Scaled DG-MOSFETs Using a Monte Carlo Method";
Journal of Computational Electronics, 4 (2005), 1-2; 67 - 70.

10.  T. Ayalew, A. Gehring, T. Grasser, S. Selberherr:
"Enhancement of Breakdown Voltage for Ni-SiC Schottky Diodes Utilizing Field Plate Edge Termination";
Microelectronics Reliability, 44 (2004), 9-11; 1473 - 1478. https://doi.org/10.1016/j.microrel.2004.07.042

9.  A. Gehring, S. Selberherr:
"Evolution of Current Transport Models for Engineering Applications";
Journal of Computational Electronics, 3 (2004), 3-4; 149 - 155. https://doi.org/10.1007/s10825-004-7035-z

8.  A. Gehring, S. Selberherr:
"Modeling of Tunneling Current and Gate Dielectric Reliability for Nonvolatile Memory Devices";
IEEE Transactions on Device and Materials Reliability, 4 (2004), 3; 306 - 319. https://doi.org/10.1109/TDMR.2004.836727

7.  A. Gehring, S. Selberherr:
"Statistical Simulation of Gate Dielectric Wearout, Leakage, and Breakdown";
Microelectronics Reliability, 44 (2004), 9-11; 1879 - 1884. https://doi.org/10.1016/j.microrel.2004.07.101

6.  A. Gehring, H. Kosina, S. Selberherr:
"Analysis of Gate Dielectric Stacks Using the Transmitting Boundary Method";
Journal of Computational Electronics, 2 (2003), 2-4; 219 - 223. https://doi.org/10.1023/B:JCEL.0000011428.85286.7d

5.  A. Gehring, T. Grasser, H. Kosina, S. Selberherr:
"Energy Transport Gate Current Model Accounting for Non-Maxwellian Energy Distribution";
Electronics Letters, 39 (2003), 8; 691 - 692. https://doi.org/10.1049/el:20030440

4.  T. Ayalew, A. Gehring, J.M. Park, T. Grasser, S. Selberherr:
"Improving SiC Lateral DMOSFET Reliability under High Field Stress";
Microelectronics Reliability, 43 (2003), 9-11; 1889 - 1894. https://doi.org/10.1016/S0026-2714(03)00321-4

3.  A. Gehring, F. Jimenez-Molinos, H. Kosina, A. Palma, F. Gamiz, S. Selberherr:
"Modeling of Retention Time Degradation Due to Inelastic Trap-Assisted Tunneling in EEPROM Devices";
Microelectronics Reliability, 43 (2003), 9-11; 1495 - 1500. https://doi.org/10.1016/S0026-2714(03)00265-8

2.  A. Gehring, T. Grasser, B.-H. Cheong, S. Selberherr:
"Design Optimization of Multi-Barrier Tunneling Devices Using the Transfer-Matrix Method";
Solid-State Electronics, 46 (2002), 10; 1545 - 1551. https://doi.org/10.1016/S0038-1101(02)00103-X

1.  A. Gehring, T. Grasser, H. Kosina, S. Selberherr:
"Simulation of Hot-Electron Oxide Tunneling Current Based on a Non-Maxwellian Electron Energy Distribution Function";
Journal of Applied Physics, 92 (2002), 10; 6019 - 6027. https://doi.org/10.1063/1.1516617

Contributions to Books

3.  M. Karner, A. Gehring, S. Holzer, H. Kosina, S. Selberherr:
"Efficient Calculation of Lifetime Based Direct Tunneling Through Stacked Dielectrics";
in: "Physics and Technology of High-k Gate Dielectrics III, Vol. 1 No. 5", S. Kar, S. De Gendt, M. Houssa, D. Landheer, D. Misra, W. Tsai (ed.); issued by: The Electrochemical Society; ECS Transactions, 2006, ISBN: 1-56677-444-6, 693 - 703. https://doi.org/10.1149/1.2209316

2.  M. Karner, A. Gehring, S. Holzer, H. Kosina:
"Efficient Calculation of Quasi-bound States for the Simulation of Direct Tunneling";
in: "Large-Scale Scientific Computing, Lecture Notes in Computer Science", 3743; I. Lirkov, S. Margenov, J. Wasniewski (ed.); Springer Berlin Heidelberg, 2006, ISBN: 3-540-31994-8, 572 - 577. https://doi.org/10.1007/11666806_65

1.  A. Gehring, S. Selberherr:
"Tunneling Models for Semiconductor Device Simulation";
in: "Handbook of Theoretical and Computational Nanotechnology", issued by: Forschungszentrum Karlsruhe; American Scientific Publishers, Los Angeles, 2006, ISBN: 1-58883-042-x, 469 - 543.

Talks and Poster Presentations (with Proceedings-Entry)

47.  M. Karner, A. Gehring, S. Holzer, M. Wagner, H. Kosina:
"Continuum Versus Quasi-Bound State Tunneling in Novel Device Architectures";
Poster: Silicon Nanoelectronics Workshop, Honolulu; 2006-06-11 - 2006-06-12; in: "Abstracts IEEE 2006 Silicon Nanoelectronics Workshop", (2006), 161 - 162.

46.  M. Karner, E. Ungersböck, A. Gehring, S. Holzer, H. Kosina, S. Selberherr:
"Strain Effects on Quasi-Bound State Tunneling in Advanced SOI CMOS Technologies";
Talk: International Conference on Simulation of Semiconductor Processes and Devices (SISPAD), Monterey, CA, USA; 2006-09-06 - 2006-09-08; in: "Proceedings of the International Conference on Simulation of Semiconductor Processes and Devices (SISPAD)", (2006), ISBN: 1-4244-0404-5; 314 - 317. https://doi.org/10.1109/SISPAD.2006.282898

45.  M. Karner, A. Gehring, S. Holzer, M. Pourfath, M. Wagner, H. Kosina, T. Grasser, S. Selberherr:
"VSP - A Multi-Purpose Schrödinger-Poisson Solver for TCAD Applications";
Poster: International Workshop on Computational Electronics (IWCE), Vienna, Austria; 2006-05-25 - 2006-05-27; in: "Book of Abstracts of the International Workshop on Computational Electronics (IWCE)", (2006), ISBN: 3-901578-16-1; 255 - 256.

44.  M. Karner, A. Gehring, M. Wagner, R. Entner, S. Holzer, W. Gös, M. Vasicek, T. Grasser, H. Kosina, S. Selberherr:
"VSP-A Gate Stack Analyzer";
Talk: Workshop on Dielectrics in Microelectronics (WODIM), Catania; 2006-06-26 - 2006-06-28; in: "WODIM 2006 14th Workshop on Dielectrics in Microelectronics Workshop Program and Abstracts", (2006), 101 - 102.

43.  A. Gehring, S. Selberherr:
"Current Transport Models for Nano-Scale Semiconductor Devices";
Talk: World Multiconference on Systemics, Cybernetics and Informatics (SCI), Orlando (invited); 2005-07-10 - 2005-07-13; in: "Proc. 9th World Multi-Conf.on Systemics, Cybernetics and Informatics", Vol. 6 (2005), ISBN: 980-6560-58-2; 366 - 371.

42.  M. Karner, A. Gehring, H. Kosina:
"Efficient Calculation of Life Time Based Direct Tunneling through Stacked Dielectrics";
Talk: Modelling and Simulation of Electron Devices (MSED), Pisa; 2005-07-04 - 2005-07-05; in: "15th Workshop on Modelling and Simulation of Electron Devices", (2005), 97 - 98.

41.  M. Karner, A. Gehring, H. Kosina, S. Selberherr:
"Efficient Calculation of Quasi-Bound State Tunneling in CMOS Devices";
Talk: International Conference on Simulation of Semiconductor Processes and Devices (SISPAD), Tokyo, Japan; 2005-09-01 - 2005-09-03; in: "Proceedings of the International Conference on Simulation of Semiconductor Processes and Devices (SISPAD)", (2005), ISBN: 4-9902762-0-5; 35 - 38. https://doi.org/10.1109/SISPAD.2005.201466

40.  M. Karner, A. Gehring, S. Holzer, H. Kosina, S. Selberherr:
"Efficient Calculation of Quasi-Bound State Tunneling through Stacked Dielectrics";
Talk: Meeting of the Electrochemical Society (ECS), Los Angeles; 2005-10-16 - 2005-10-21; in: "208th ECS Meeting", 1119 (2005), ISSN: 1091-8213; 1 pages.

39.  R. Entner, A. Gehring, H. Kosina, T. Grasser, S. Selberherr:
"Impact of Multi-Trap Assisted Tunneling on Gate Leakage of CMOS Memory Devices";
Talk: The Nanotechnology Conference and Trade Show, Anaheim; 2005-05-08 - 2005-05-12; in: "NSTI Nanotech Technical Proceedings", Vol. 3 (CDROM ISBN 0-9767985-4-9) (2005), ISBN: 0-9767985-2-2; 45 - 48.

38.  R. Wittmann, H. Puchner, L. Hinh, H. Ceric, A. Gehring, S. Selberherr:
"Impact of NBTI-driven Parameter Degradation on Lifetime of a 90nm p-MOSFET";
Poster: IEEE International Reliability Workshop (IIRW), S. Lake Tahoe; 2005-10-17 - 2005-10-20; in: "Final Report of the IEEE International Integrated Reliability Workshop (IIRW)", (2005), ISBN: 0-7803-8992-1; 99 - 102.

37.  R. Entner, A. Gehring, H. Kosina, T. Grasser, S. Selberherr:
"Modeling of Tunneling Currents for Highly Degraded CMOS Devices";
Poster: International Conference on Simulation of Semiconductor Processes and Devices (SISPAD), Tokyo, Japan; 2005-09-01 - 2005-09-03; in: "Proceedings of the International Conference on Simulation of Semiconductor Processes and Devices (SISPAD)", (2005), ISBN: 4-9902762-0-5; 219 - 222. https://doi.org/10.1109/SISPAD.2005.201512

36.  M. Karner, A. Gehring, S. Holzer, H. Kosina:
"On the Efficient Calculation of Quasi-Bound States for the Simulation of Direct Tunneling";
Talk: International Conference on Large-Scale Scientific Computations (LSSC), Sozopol, Bulgaria; 2005-06-06 - 2005-06-10; in: "Proceedings of the International Conference on Large-Scale Scientific Computations (LSSC)", (2005), 33 - 34.

35.  A. Gehring, V. Sverdlov, H. Kosina, S. Selberherr:
"Quantum Transport in Ultra-Scaled Double-gate MOSFETs: A Wigner Function-based Monte Carlo Approach";
Talk: Workshop of the Thematic Network on Silicon On Insulator Technology, Devices and Circuits (EUROSOI), Granada; 2005-01-19 - 2005-01-21; in: "EUROSOI 2005 First Workshop of the Thematic Network on Silicon On Insulator Technology, Devices and Circuits", (2005), 71 - 72.

34.  R. Wittmann, H. Puchner, L. Hinh, H. Ceric, A. Gehring, S. Selberherr:
"Simulation of Dynamic NBTI Degradation for a 90 nm CMOS Technology";
Talk: The Nanotechnology Conference and Trade Show, Anaheim; 2005-05-08 - 2005-05-12; in: "NSTI Nanotech Technical Proceedings", Vol. 3 (CDROM ISBN 0-9767985-4-9) (2005), ISBN: 0-9767985-2-2; 29 - 32.

33.  V. Sverdlov, A. Gehring, H. Kosina, S. Selberherr:
"Tunneling and Intersubband Coupling in Ultra-Thin Body Double-Gate MOSFETs";
Talk: European Solid-State Device Research Conference (ESSDERC), Grenoble; 2005-09-12 - 2005-09-16; in: "Proceedings of the European Solid-State Device Research Conference (ESSDERC)", Cdrom Isbn: 0-7803-9204-3 (2005), ISBN: 0-7803-9203-5; 93 - 96.

32.  M. Pourfath, A. Gehring, B.-H. Cheong, W.J. Park, H. Kosina, S. Selberherr:
"Vertically Grown Coaxial Double Gate Carbon Nanotube Field Effect Transistors for Tera Level Integration";
Talk: The Nanotechnology Conference and Trade Show, Anaheim; 2005-05-08 - 2005-05-12; in: "NSTI Nanotech Technical Proceedings", Vol. 3 (CDROM ISBN: 0-9767985-4-9) (2005), ISBN: 0-9767985-2-2; 128 - 131.

31.  R. Entner, A. Gehring, T. Grasser, S. Selberherr:
"A Comparison of Quantum Correction Models for the Three-Dimensional Simulation of FinFET Structures";
Poster: International Spring Seminar on Electronics Technology (ISSE), Sofia; 2004-05-13 - 2004-05-16; in: "Proceedings IEEE International Spring Seminar on Electronics Technology 27th ISSE 2004", IEEE, 1 (2004), ISBN: 0-7803-8422-9; 114 - 117.

30.  A. Gehring, S. Selberherr:
"Evolution of Current Transport Models for Engineering Applications";
Talk: International Workshop on Computational Electronics (IWCE), West Lafayette, IN, USA (invited); 2004-10-24 - 2004-10-27; in: "Book of Abstracts of the International Workshop on Computational Electronics (IWCE)", (2004), ISBN: 0-7803-8649-3; 20 - 21. https://doi.org/10.1109/IWCE.2004.1407298

29.  A. Gehring, S. Selberherr:
"Gate Current Modeling for MOSFETs";
Talk: International Caracas Conference on Devices, Circuits and Systems (ICCDCS), Punta Cana (invited); 2004-11-03 - 2004-11-05; in: "Proceedings of the ICCDCS 2004", (2004), ISBN: 0-7803-8777-5; 1 - 8.

28.  A. Gehring, S. Selberherr:
"Gate Leakage Models for Device Simulation";
Talk: International Conference on Solid State and Integrated Circuit Technology (ICSICT), Beijing (invited); 2004-10-18 - 2004-10-21; in: "7th International Conference on Solid-State and Integrated Circuits Technology Proceedings", R. Huang, M. Yu, J. Liou, T. Hiramoto, C. Claeys (ed.); IEEE Press, Volume II (2004), ISBN: 0-7803-8511-x; 971 - 976.

27.  M. Pourfath, E. Ungersböck, A. Gehring, B.-H. Cheong, W. Park, H. Kosina, S. Selberherr:
"Improving the Ambipolar Behavior of Schottky Barrier Carbon Nanotube Field Effect Transistors";
Talk: European Solid-State Device Research Conference (ESSDERC), Leuven; 2004-09-21 - 2004-09-23; in: "Proceedings of the European Solid-State Device Research Conference (ESSDERC)", Institute of Electrical and Electronics Engineers, (2004), ISBN: 0780384784; 429 - 432.

26.  A. Gehring, S. Selberherr:
"Modeling of Wearout, Leakage, and Breakdown of Gate Dielectrics";
Talk: IEEE International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA), Hsinchu; 2004-07-05 - 2004-07-08; in: "11th International Symposium on the Physical & Failure Analysis of Integrated Circuits", (2004), ISBN: 0-7803-8454-7; 61 - 64.

25.  M. Pourfath, E. Ungersböck, A. Gehring, W. Park, B.-H. Cheong, H. Kosina, S. Selberherr:
"Numerical Analysis of Coaxial Double Gate Schottky Barrier Carbon Nanotube Field Effect Transistors";
Poster: International Workshop on Computational Electronics (IWCE), West Lafayette, IN, USA; 2004-10-24 - 2004-10-27; in: "Book of Abstracts of the International Workshop on Computational Electronics (IWCE)", (2004), ISBN: 0-7803-8649-3; 237 - 238. https://doi.org/10.1109/IWCE.2004.1407414

24.  A. Gehring, S. Selberherr:
"On the Calculation of Quasi-Bound States and Their Impact on Direct Tunneling in CMOS Devices";
Talk: International Conference on Simulation of Semiconductor Processes and Devices (SISPAD), Munich, Germany; 2004-09-02 - 2004-09-04; in: "Proceedings of the International Conference on Simulation of Semiconductor Processes and Devices (SISPAD)", Springer, (2004), ISBN: 3211224688; 25 - 28. https://doi.org/10.1007/978-3-7091-0624-2_6

23.  E. Ungersböck, M. Pourfath, A. Gehring, H. Kosina, B.-H. Cheong, S. Selberherr:
"Optimization of Carbon Nanotube Field Effect Transistors";
Poster: Symposium on Nano Device Technology (SNDT), Hsinchu; 2004-05-12 - 2004-05-13; in: "Proceedings of the Symposium on Nano Device Technology", (2004), 117 - 120.

22.  M. Pourfath, E. Ungersböck, A. Gehring, B.-H. Cheong, W. Park, H. Kosina, S. Selberherr:
"Optimization of Schottky Barrier Carbon Nanotube Field Effect Transistors";
Talk: Nano and Giga Challenges in Microelectronics (NGCM), Krakau; 2004-09-13 - 2004-09-17; in: "Nano and Giga Challenges in Microelectronics Book of Abstracts", (2004), 201.

21.  M. Pourfath, E. Ungersböck, A. Gehring, B.-H. Cheong, H. Kosina, S. Selberherr:
"Three-Dimensional Analysis of Schottky Barrier Carbon Nanotube Field Effect Transistors";
Talk: International Conference on Simulation of Semiconductor Processes and Devices (SISPAD), Munich, Germany; 2004-09-02 - 2004-09-04; in: "Proceedings of the International Conference on Simulation of Semiconductor Processes and Devices (SISPAD)", Springer, (2004), ISBN: 3211224688; 149 - 152. https://doi.org/10.1007/978-3-7091-0624-2_35

20.  A. Gehring, H. Kosina:
"Wigner-Function Based Simulation of Classic and Ballistic Transport in Scaled DG-MOSFETs Using the Monte Carlo Method";
Poster: International Workshop on Computational Electronics (IWCE), West Lafayette, IN, USA; 2004-10-24 - 2004-10-27; in: "Book of Abstracts of the International Workshop on Computational Electronics (IWCE)", (2004), ISBN: 0-7803-8649-3; 227 - 228. https://doi.org/10.1109/IWCE.2004.1407409

19.  A. Gehring, T. Grasser, H. Kosina, S. Selberherr:
"An Energy Transport Gate Current Model Based on a Non-Maxwellian Energy Distribution";
Talk: International Conference on Modeling and Simulation of Microsystems (MSM), San Francisco; 2003-02-23 - 2003-02-27; in: "Technical Proceedings of the 2003 Nanotechnology Conference and Trade Show", (2003), ISBN: 0-9728422-1-7; 48 - 51.

18.  E. Ungersböck, A. Gehring, H. Kosina, S. Selberherr, B.-H. Cheong, W. B. Choi:
"Analysis of Carrier Transport in Carbon Nanotube FET Devices";
Talk: International Workshop on the Physics of Semiconductor Devices (IWPSD), Madras; 2003-12-16 - 2003-12-20; in: "Proceedings of the Twelfth International Workshop on the Physics of Semiconductor Devices", (2003), ISBN: 81-7319-567-6; 1059 - 1061.

17.  A. Gehring, H. Kosina, S. Selberherr:
"Analysis of Gate Dielectric Stacks Using the Transmitting Boundary Method";
Talk: International Workshop on Computational Electronics (IWCE), Rome, Italy; 2003-05-25 - 2003-05-28; in: "Book of Abstracts of the International Workshop on Computational Electronics (IWCE)", (2003), 105 - 106.

16.  A. Gehring, H. Kosina, T. Grasser, S. Selberherr:
"Consistent Comparison of Tunneling Models for Device Simulation";
Poster: Workshop on Ultimate Integration of Silicon (ULIS), Udine; 2003-03-20 - 2003-03-21; in: "4th European Workshop on Ultimate Integration of Silicon", (2003), ISBN: 88-900984-0-6; 131 - 134.

15.  A. Gehring, S. Harasek, E. Bertagnolli, S. Selberherr:
"Evaluation of ZrO2 Gate Dielectrics for Advanced CMOS Devices";
Poster: European Solid-State Device Research Conference (ESSDERC), Estoril; 2003-09-16 - 2003-09-18; in: "Proceedings of the European Solid-State Device Research Conference (ESSDERC)", (2003), ISBN: 0-7803-7999-3; 473 - 476.

14.  T. Ayalew, J.M. Park, A. Gehring, T. Grasser, S. Selberherr:
"Modeling and Simulation of SiC MOSFETs";
Talk: International Conference on Applied Modelling and Simulation, Marbella; 2003-09-03 - 2003-09-05; in: "Proceedings of the Twelfth IASTED International Conference on Applied Simulation and Modelling", (2003), ISBN: 0-88986-384-9; 552 - 556.

13.  T. Ayalew, J.M. Park, A. Gehring, T. Grasser, S. Selberherr:
"Silicon Carbide Accumulation-Mode Laterally Diffused MOSFET";
Poster: European Solid-State Device Research Conference (ESSDERC), Estoril; 2003-09-16 - 2003-09-18; in: "Proceedings of the European Solid-State Device Research Conference (ESSDERC)", (2003), ISBN: 0-7803-7999-3; 581 - 584.

12.  E. Ungersböck, A. Gehring, H. Kosina, S. Selberherr, B.-H. Cheong, W. B. Choi:
"Simulation of Carrier Transport in Carbon Nanotube Field Effect Transistors";
Talk: European Solid-State Device Research Conference (ESSDERC), Estoril; 2003-09-16 - 2003-09-18; in: "Proceedings of the European Solid-State Device Research Conference (ESSDERC)", (2003), ISBN: 0-7803-7999-3; 411 - 414.

11.  F. Jimenez-Molinos, A. Palma, A. Gehring, F. Gamiz, H. Kosina, S. Selberherr:
"Static and Transient Simulation of Inelastic Trap-Assisted Tunneling";
Talk: Workshop on Modeling and Simulation of Electron Devices (MSED), Barcelona; 2003-10-16 - 2003-10-17; in: "14th Workshop on Modeling and Simulation of Electron Devices", (2003), ISBN: 84-688-1314-1; 65 - 68.

10.  A. Gehring, T. Grasser, H. Kosina, S. Selberherr:
"A New Gate Current Model Accounting for a Non-Maxwellian Electron Energy Distribution Function";
Talk: International Conference on Simulation of Semiconductor Processes and Devices (SISPAD), Kobe, Japan; 2002-09-04 - 2002-09-06; in: "Proceedings of the International Conference on Simulation of Semiconductor Processes and Devices (SISPAD)", (2002), ISBN: 4-89114-027-5; 235 - 238. https://doi.org/10.1109/SISPAD.2002.1034560

9.  T. Grasser, A. Gehring, S. Selberherr:
"Macroscopic Transport Models for Microelectronics Devices";
Talk: World Multiconference on Systemics, Cybernetics and Informatics (SCI), Orlando (invited); 2002-07-14 - 2002-07-18; in: "The 6th World Multiconference on Systemics, Cybernetics and Informatics", (2002), ISBN: 980-07-8150-1; 223 - 228.

8.  A. Gehring, T. Grasser, S. Selberherr:
"Non-Parabolicity and Non-Maxwellian Effects on Gate Oxide Tunneling";
Talk: International Conference on Modeling and Simulation of Microsystems (MSM), San Juan; 2002-04-21 - 2002-04-25; in: "Technical Proceedings of the Fifth International Conference on Modeling and Simulation of Microsystems", (2002), ISBN: 0-9708275-7-1; 560 - 563.

7.  T. Grasser, A. Gehring, S. Selberherr:
"Recent Advances in Transport Modeling for Miniaturized CMOS Devices";
Talk: International Caracas Conference on Devices, Circuits and Systems (ICCDCS), Aruba (invited); 2002-04-17 - 2002-04-19; in: "Proceedings of the ICCDCS 2002", D027 (2002), ISBN: 0-7803-7380-4; 1 - 8.

6.  A. Gehring, F. Jimenez-Molinos, A. Palma, H. Kosina, S. Selberherr:
"Simulation of Non-Volatile Memory Cells by Accounting for Inelastic Trap-Assisted Tunneling Current";
Talk: Workshop on Ultimate Integration of Silicon (ULIS), München; 2002-03-07 - 2002-03-08; in: "3rd European Workshop on Ultimate Integration of Silicon", (2002), 15 - 18.

5.  A. Gehring, H. Kosina, S. Selberherr:
"Transmission Coefficient Estimation for High-k Gate Stack Evaluation";
Talk: International Conference on Nanoelectronics and Electromagnetic Compatibility, Skiathos; 2002-09-25 - 2002-09-28; in: "Advances in Simulation, Systems Theory, and Systems Engineering", WSEAS Press, (2002), ISBN: 960-8052-70-x; 156 - 159.

4.  A. Gehring, T. Grasser, S. Selberherr:
"Design Optimization of Multi-Barrier Tunneling Devices Using the Transfer Matrix Method";
Poster: International Semiconductor Device Research Symposium (ISDRS), Washington; 2001-12-05 - 2001-12-07; in: "2001 International Semiconductor Device Research Symposium", (2001), 260 - 263.

3.  A. Gehring, M. Steinbauer, I Gaspard, M. Grigat:
"Empirical Channel Stationarity in Urban Environments";
Talk: 4th European Personal Mobile Communications Conference (EPMCC 2001), Vienna, Austria; 2001-02-20 - 2001-02-22; in: "Proceedings of the European Personal Mobile Communications Conference", (2001).

2.  A. Gehring, C. Heitzinger, T. Grasser, S. Selberherr:
"TCAD Analysis of Gain Cell Retention Time for SRAM Applications";
Poster: International Conference on Simulation of Semiconductor Processes and Devices (SISPAD), Athens, Greece; 2001-09-05 - 2001-09-07; in: "Proceedings of the International Conference on Simulation of Semiconductor Processes and Devices (SISPAD)", (2001), ISBN: 3-211-83708-6; 416 - 419. https://doi.org/10.1007/978-3-7091-6244-6_96

1.  J. Broeker, A. Gehring, T. Sauter:
"Simulation und Analyse von Single-Clock CMOS FlipFlops.";
Talk: Austrochip 2000, Graz; 2000-10-13; in: "Tagungsband zur Austrochip 2000", (2000), 61 - 70.

Talks and Poster Presentations (without Proceedings-Entry)

3.  T. Ayalew, A. Gehring, T. Grasser, S. Selberherr:
"Enhancement of Breakdown Voltage for Ni-SiC Schottky Diodes Utilizing Field Plate Edge Termination";
Poster: European Symposium on Reliability of Electron Devices, Failure Physics and Analysis (ESREF), Zürich; 2004-10-04 - 2004-10-08.

2.  T. Ayalew, A. Gehring, J.M. Park, T. Grasser, S. Selberherr:
"Improving SiC Lateral DMOSFET Reliability under High Field Stress";
Poster: European Symposium on Reliability of Electron Devices, Failure Physics and Analysis (ESREF), Arcachon; 2003-10-07 - 2003-10-10.

1.  A. Gehring, F. Jimenez-Molinos, H. Kosina, A. Palma, F. Gamiz, S. Selberherr:
"Modeling of Retention Time Degradation Due to Inelastic Trap-Assisted Tunneling in EEPROM Devices";
Poster: European Symposium on Reliability of Electron Devices, Failure Physics and Analysis (ESREF), Arcachon; 2003-10-07 - 2003-10-10.

Doctor's Theses (authored and supervised)

1.  A. Gehring:
"Simulation of Tunneling in Semiconductor Devices";
Supervisor, Reviewer: S. Selberherr, E. Bertagnolli; Institut für Mikroelektronik, 2003; oral examination: 2003-12-05.

Diploma and Master Theses (authored and supervised)

6.  A. Gehring, S. Selberherr:
"Statistical Simulation of Gate Dielectric Wearout, Leakage, and Breakdown";
Talk: European Symposium on Reliability of Electron Devices, Failure Physics and Analysis (ESREF), Zürich; 2004-10-04 - 2004-10-08.

5.  M. Karner:
"Multi-Dimensional Simulation of Closed Quantum Systems";
Supervisor: T. Grasser, A. Gehring; Institut für Mikroelektronik, 2004.

4.  M. Spevak:
"Simulation of Rotationally Symmetric Semiconductor Devices";
Supervisor: T. Grasser, A. Gehring; Institut für Mikroelektronik, 2004.

3.  R. Entner:
"Three-Dimensional Device Simulation with MINIMOS-NT Using the Wafer-State-Server";
Supervisor: T. Grasser, A. Gehring; Institut für Mikroelektronik, 2003.

2.  M. Zohlhuber:
"Visualisierung von Simulationsdaten";
Supervisor: E. Langer, A. Gehring; Institut für Mikroelektronik, 2003.

1.  A. Gehring:
"System-Level Simulations for the Time-Division-Duplex Mode of UMTS";
Supervisor: T. Neubauer; E 389, 2000.

Scientific Reports

4.  A. Gehring, M. Pourfath, E. Ungersböck, S. Wagner, W. Wessner, S. Selberherr:
"VISTA Status Report December 2004";
2004; 32 pages.

3.  A. Gehring, C. Heitzinger, A. Hössinger, E. Ungersböck, W. Wessner, S. Selberherr:
"VISTA Status Report December 2003";
2003; 29 pages.

2.  H. Ceric, K. Dragosits, A. Gehring, S. Smirnov, V. Palankovski, S. Selberherr:
"VISTA Status Report December 2002";
2002; 35 pages.

1.  T. Binder, J. Cervenka, A. Gehring, C. Harlander, C. Heitzinger, S. Selberherr:
"VISTA Status Report June 2001";
2001; 24 pages.