Publications Jong Mun Park

27 records

Publications in Scientific Journals

8.  I. Starkov, S. E. Tyaginov, H. Enichlmair, J.M. Park, H. Ceric, T. Grasser:
"Accurate Extraction of MOSFET Unstressed Interface State Spatial Distribution from Charge Pumping Measurements";
Solid State Phenomena, 178-179 (2011), 267 - 272. https://doi.org/10.4028/www.scientific.net/SSP.178-179.267

7.  S. E. Tyaginov, I. Starkov, H. Enichlmair, C. Jungemann, J.M. Park, E. Seebacher, R. Orio, H. Ceric, T. Grasser:
"An Analytical Approach for Physical Modeling of Hot-Carrier Induced Degradation";
Microelectronics Reliability, 51 (2011), 1525 - 1529. https://doi.org/10.1016/j.microrel.2011.07.089

6.  I. Starkov, S. E. Tyaginov, H. Enichlmair, J. Cervenka, C. Jungemann, S. Carniello, J.M. Park, H. Ceric, T. Grasser:
"Hot-Carrier Degradation Caused Interface State Profile-Simulation versus Experiment";
Journal of Vacuum Science & Technology B, 29 (2011), 01AB09-1 - 01AB09-8. https://doi.org/10.1116/1.3534021

5.  C. Heitzinger, A. Sheikholeslami, J.M. Park, S. Selberherr:
"A Method for Generating Structurally Aligned Grids for Semiconductor Device Simulation";
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 24 (2005), 10; 1485 - 1491. https://doi.org/10.1109/TCAD.2005.852297

4.  J.M. Park, R. Klima, S. Selberherr:
"High-Voltage Lateral Trench Gate SOI-LDMOSFETs";
Microelectronics Journal, 35 (2004), 3; 299 - 304. https://doi.org/10.1016/S0026-2692(03)00192-7

3.  J.M. Park, S. Wagner, T. Grasser, S. Selberherr:
"New SOI Lateral Power Devices with Trench Oxide";
Solid-State Electronics, 48 (2004), 6; 1007 - 1015. https://doi.org/10.1016/j.sse.2003.12.015

2.  J.M. Park, T. Grasser, H. Kosina, S. Selberherr:
"A Numerical Study of Partial-SOI LDMOSFETs";
Solid-State Electronics, 47 (2003), 2; 275 - 281. https://doi.org/10.1016/S0038-1101(02)00207-1

1.  T. Ayalew, A. Gehring, J.M. Park, T. Grasser, S. Selberherr:
"Improving SiC Lateral DMOSFET Reliability under High Field Stress";
Microelectronics Reliability, 43 (2003), 9-11; 1889 - 1894. https://doi.org/10.1016/S0026-2714(03)00321-4

Talks and Poster Presentations (with Proceedings-Entry)

16.  S. E. Tyaginov, I. Starkov, O. Triebl, M. Karner, C. Kernstock, C. Jungemann, H. Enichlmair, J.M. Park, T. Grasser:
"Impact of Gate Oxide Thickness Variations on Hot-Carrier Degradation";
Poster: IEEE International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA), Singapore; 2012-07-02 - 2012-07-06; in: "Proceedings of the 19th International Symposium on the Physical & Failure Analysis of Integrated Circuits", (2012), ISBN: 978-1-4673-0980-6; 1 - 5. https://doi.org/10.1109/IPFA.2012.6306265

15.  J. Cervenka, A. Steinmair, J.M. Park, E. Seebacher, T. Grasser:
"TCAD Simulations of Statistical Process Variations for High-Voltage LDMOS Transistors";
Talk: European Workshop on CMOS Variability, Nice, France; 2012-06-11 - 2012-06-12; in: "Proceedings of the 3rd European Workshop on CMOS Variability", (2012), ISBN: 978-2-914561-56-3; 4 pages.

14.  I. Starkov, S. E. Tyaginov, H. Enichlmair, J.M. Park, H. Ceric, T. Grasser:
"Accurate Extraction of MOSFET Interface State Spatial Distribution from Charge Pumping Measurements";
Talk: Gettering and Defect Engineering in Semiconductor Technology, Loipersdorf, Austria; 2011-09-25 - 2011-09-30; in: "GADEST 2011: Abstract Booklet", (2011), 105 - 106.

13.  S. E. Tyaginov, I. Starkov, H. Enichlmair, C. Jungemann, J.M. Park, E. Seebacher, R. Orio, H. Ceric, T. Grasser:
"An Analytical Approach for Physical Modeling of Hot-Carrier Induced Degradation";
Talk: 22nd European Symposium on the Reliability of Electron Devices, Failure Physics and Analysis, Bordeaux, France; 2011-10-03 - 2011-10-07; in: "Proceedings of the 22nd European Symposium on the Reliability of Electron Devices, Failure Physics and Analysis", 51 (2011), 1525 - 1529.

12.  S. E. Tyaginov, I. Starkov, C. Jungemann, H. Enichlmair, J.M. Park, T. Grasser:
"Impact of the Carrier Distribution Function on Hot-Carrier Degradation Modeling";
Talk: European Solid-State Device Research Conference (ESSDERC), Helsinki, Finland; 2011-09-12 - 2011-09-16; in: "Proceedings of the European Solid-State Device Research Conference (ESSDERC)", (2011), 151 - 154.

11.  I. Starkov, S. E. Tyaginov, O. Triebl, J. Cervenka, C. Jungemann, S. Carniello, J.M. Park, H. Enichlmair, M. Karner, C. Kernstock, E. Seebacher, R. Minixhofer, H. Ceric, T. Grasser:
"Analysis of Worst-Case Hot-Carrier Conditions for High Voltage Transistors Based on Full-Band Monte-Carlo Simulations";
Poster: IEEE International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA), Singapore; 2010-07-05 - 2010-07-09; in: "Proceedings of the 17th International Symposium on the Physical & Failure Analysis of Integrated Circuits", (2010), ISBN: 978-1-4244-5595-9; 139 - 144.

10.  I. Starkov, S. E. Tyaginov, H. Enichlmair, O. Triebl, J. Cervenka, C. Jungemann, S. Carniello, J.M. Park, H. Ceric, T. Grasser:
"HC Degradation Model: Interface State Profile-Simulations vs. Experiment";
Poster: Workshop on Dielectrics in Microelectronics (WODIM), Bratislava; 2010-06-28 - 2010-06-30; in: "Book of Abstracts", (2010), 128.

9.  S. E. Tyaginov, I. Starkov, O. Triebl, J. Cervenka, C. Jungemann, S. Carniello, J.M. Park, H. Enichlmair, M. Karner, C. Kernstock, E. Seebacher, R. Minixhofer, H. Ceric, T. Grasser:
"Hot-Carrier Degradation Modeling Using Full-Band Monte-Carlo Simulations";
Talk: IEEE International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA), Singapore; 2010-07-05 - 2010-07-09; in: "Proceedings of the 17th International Symposium on the Physical & Failure Analysis of Integrated Circuits", (2010), ISBN: 978-1-4244-5595-9; 341 - 345.

8.  S. E. Tyaginov, I. Starkov, O. Triebl, J. Cervenka, C. Jungemann, S. Carniello, J.M. Park, H. Enichlmair, M. Karner, C. Kernstock, E. Seebacher, R. Minixhofer, H. Ceric, T. Grasser:
"Interface Traps Density-of-States as a Vital Component for Hot-Carrier Degradation Modeling";
Talk: European Symposium on Reliability of Electron Devices, Failure Physics and Analysis (ESREF), Montecassino Abbey and Gaeta; 2010-10-11 - 2010-10-15; in: "Proceedings of the 21st European Symposium on the Reliability of Electron Devices, Failure Physics and Analysis", (2010), 3 pages.

7.  C. Heitzinger, A. Sheikholeslami, J.M. Park, S. Selberherr:
"A Method for Generating Structurally Aligned High Quality Grids and its Application to the Simulation of a Trench Gate MOSFET";
Poster: European Solid-State Device Research Conference (ESSDERC), Estoril; 2003-09-16 - 2003-09-18; in: "Proceedings of the European Solid-State Device Research Conference (ESSDERC)", (2003), ISBN: 0-7803-7999-3; 457 - 460.

6.  J.M. Park, T. Grasser, S. Selberherr:
"High-Voltage Super-Junction SOI-LDMOSFETs with Reduced Drift Length";
Talk: Meeting of the Electrochemical Society (ECS), Paris; 2003-04-26 - 2003-05-02; in: "203rd ECS Meeting", (2003), ISBN: 1-56677-347-4; 273 - 282.

5.  T. Ayalew, J.M. Park, A. Gehring, T. Grasser, S. Selberherr:
"Modeling and Simulation of SiC MOSFETs";
Talk: International Conference on Applied Modelling and Simulation, Marbella; 2003-09-03 - 2003-09-05; in: "Proceedings of the Twelfth IASTED International Conference on Applied Simulation and Modelling", (2003), ISBN: 0-88986-384-9; 552 - 556.

4.  T. Ayalew, J.M. Park, A. Gehring, T. Grasser, S. Selberherr:
"Silicon Carbide Accumulation-Mode Laterally Diffused MOSFET";
Poster: European Solid-State Device Research Conference (ESSDERC), Estoril; 2003-09-16 - 2003-09-18; in: "Proceedings of the European Solid-State Device Research Conference (ESSDERC)", (2003), ISBN: 0-7803-7999-3; 581 - 584.

3.  J.M. Park, R. Klima, S. Selberherr:
"High-Voltage Lateral Trench Gate SOI LDMOSFETs";
Poster: International Seminar on Power Semiconductors (ISPS), Prague; 2002-09-04 - 2002-09-06; in: "Proceedings ISPS 2002", (2002), ISBN: 80-01-02595-0; 241 - 244.

2.  J.M. Park, R. Klima, S. Selberherr:
"Lateral Trench Gate Super-Junction SOI-LDMOSFETs with Low On-Resistance";
Talk: European Solid-State Device Research Conference (ESSDERC), Florence; 2002-09-24 - 2002-09-26; in: "Proceedings of the European Solid-State Device Research Conference (ESSDERC)", (2002), ISBN: 88-900847-8-2; 283 - 286.

1.  J.M. Park, T. Grasser, H. Kosina, S. Selberherr:
"Numerical Study of Partial-SOI LDMOSFET Power Devices";
Poster: International Semiconductor Device Research Symposium (ISDRS), Washington; 2001-12-05 - 2001-12-07; in: "2001 International Semiconductor Device Research Symposium", (2001), 114 - 117.

Talks and Poster Presentations (without Proceedings-Entry)

1.  T. Ayalew, A. Gehring, J.M. Park, T. Grasser, S. Selberherr:
"Improving SiC Lateral DMOSFET Reliability under High Field Stress";
Poster: European Symposium on Reliability of Electron Devices, Failure Physics and Analysis (ESREF), Arcachon; 2003-10-07 - 2003-10-10.

Doctor's Theses (authored and supervised)

1.  J.M. Park:
"Novel Power Devices for Smart Power Applications";
Supervisor, Reviewer: S. Selberherr, E. Bertagnolli; Institut für Mikroelektronik, 2004; oral examination: 2004-12-07. https://doi.org/10.34726/hss.2004.1715

Scientific Reports

1.  M. Gritsch, C. Heitzinger, J.M. Park, R. Klima, R. Rodriguez-Torres, S. Selberherr:
"VISTA Status Report June 2002";
2002; 44 pages.