Metal-oxide-semiconductor (MOS) technology stands at the heart of modern electronics. Despite the numerous improvements introduced over the past 60 years, MOS transistors still suffer from imperfections at the atomic level which can seriously impede their performance and lifetime. While most devices are built on a silicon (Si) substrate, emerging wide-bandgap materials systems, such as silicon-carbide (SiC), have shown a lot of promise particularly for energy-efficient and thus “green” high-power applications. However, these alternative material systems exhibit a much higher density of electrically active defects compared to Si devices, and therefore further improvement is essential to considerably increase their commercial value.
The aforementioned imperfections at the atomic level are commonly referred to as defects in the device structure and arise on the one hand from unsaturated bonds at the semiconductor/oxide interface (so-called interface states), but also from defects in the atomic structure of the oxide and the semiconductor substrate. Commonly, all these defects can significantly affect the performance of modern transistors. Furthermore, such defects can hardly be prevented during production, and even worse, new defects can be generated during normal device operation. Recent intensive investigations of nanoscale transistors have provided insight into the electrical behavior of individual defects and their impact on the characteristics and lifetime of single transistors. During the course of the Christian Doppler Laboratory for Single-Defect Spectroscopy in Semiconductor Devices charge trapping of defects will be thoroughly studied while considering novel devices employing Si and SiC substrates. For this, measurement instruments and analysis software will be developed and enhanced to be suitable for defect characterization in large area and scaled transistor prototypes. In addition to the experimental challenges, the physical modeling and interpretation of experimental data is another exciting challenge.
Simulation models will be developed to explain effects such as low-frequency noise, hysteresis, drift of the threshold voltage, carrier tunneling, and oxide breakdown. The new models and tools will be used by our industrial project partners ams AG, Global TCAD Solutions and Infineon Technologies Austria AG and will considerably advance the state-of-the-art. These models will contribute significantly to the understanding and optimization of their semiconductor technology products. The device characterization and model development will primarily be carried out at the Institute for Microelectronics, TU Wien where the research team is settled. Finally, substantial financial support of the Christian Doppler Forschungsgesellschaft of our joint research project is gratefully acknowledged.