2.7 SiC Insulators

The vast majority of semiconductor integrated circuits in use today rely on silicon Metal-Oxide-Semiconductor Field Effect Transistors (MOSFETs), whose electronic advantages and operational device physics are summarized in [37,40]. Given the extreme usefulness and success of MOSFET-based electronics in VLSI silicon, it is naturally desirable to implement high-performance inversion channel MOSFETs in SiC. Like silicon, SiC forms a thermal oxide when it is sufficiently heated in an oxygen environment. While this enables SiC MOS technology to somewhat follow the highly successful path of silicon MOS technology, there are nevertheless important differences in insulator quality and device processing that are presently preventing SiC MOSFETs from realizing their full potential. While the following discourse attempts to highlight key issues facing SiC MOSFET development, more detailed insights can be found in [94,95]. In highlighting the difficulties facing SiC MOSFET development, it is important to keep in mind that early silicon MOSFETs faced similar developmental challenges that took many years of dedicated research efforts to successfully overcome.

From a purely electrical point of view, there are two prime operational deficiencies of SiC oxides and MOSFETs compared to silicon MOSFETs. First, effective inversion channel mobilities in most SiC MOSFETs are much lower (typically well under 100 cm$^2$/V-s for inversion electrons) than one would expect based on silicon inversion channel MOSFET carrier mobilities. This seriously reduces the transistor gain and current-carrying capability of SiC MOSFETs, so that SiC MOSFETs are not nearly as advantageous as theoretically predicted. Second, SiC oxides have not proven as reliable and immutable as silicon oxides, in that SiC MOSFETs are more prone to threshold voltage shifts, gate leakage, and oxide failures than comparably-biased silicon MOSFETs. SiC MOSFET oxide electrical performance deficiencies appear mostly attributable to differences between silicon and SiC thermal oxide quality and interface structure. SiC oxides to exhibit higher levels of interface state densities ( $\sim10^{11}-10^{12}$ eV$^{-1}$ cm$^{-2}$), fixed oxide charges ( $\sim10^{11}-10^{12}$ cm$^{-2}$), charge trapping, carrier oxide tunneling, and roughness-related scattering of inversion channel carriers.

One of the most obvious differences between thermal oxidation of silicon and SiC to form SiO$_2$ is the presence of C in SiC. While most of the C in SiC converts to gaseous CO and CO$_2$ and escapes the oxide layer during thermal oxidation, leftover C species residing near the SiC-SiO$_2$ interface nevertheless appear to have a detrimental impact on SiO$_2$ electrical quality [94,95]. Cleaning treatments and oxidation/anneal recipes aimed at reducing interfacial C appear to improve SiC oxide quality. Another procedure employed to minimize detrimental carbon effects has been to form gate oxides by thermally oxidizing layers of silicon deposited on top of SiC [96]. Likewise, deposited insulators also show promise toward improving SiC MOSFET characteristics. Recently improved SiC inversion channel carrier mobilities ($\>100$ cm$^2$/Vs) using thick deposited gate-insulators has been reported [97].

SiC surfaces are well known to be much rougher than silicon surfaces, due to off-angle polishing needed to support SiC homoepitaxy as well as step-bunching (particularly pronounced in 4H-SiC) that occurs during SiC homoepilayer growth (subsection 2.3.3.2) [52]. The impact of surface morphology on the inversion channel mobility is highlighted by the work of [88], in which improved mobility ($\>100$ cm$^2$/Vs) was obtained by specifically orienting SiC MOSFETs in a direction so that the current flowed parallel to the surface step texture. The interface roughness of SiC may also be a factor in poor oxide reliability by assisting unwanted injection of carriers that damage and degrade the oxide.

The wide bandgap of SiC reduces the potential barrier impeding tunneling of hot carriers through SiC thermal oxides, so that perfectly-grown oxides on atomically smooth SiC would not be as reliable as silicon thermal oxides [98]. Therefore, it is highly probable that alternative gate-insulators will have to be developed for optimized implementation of inversion channel SiC FETs for the most demanding high-power and high-temperature electronic applications.

T. Ayalew: SiC Semiconductor Devices Technology, Modeling, and Simulation