A lithography step is used to transfer layout information to the wafer. The layout is a collection of masks which define specific patterns for the generation of the IC, for instance the definition of the active area of a transistor, or the gate area of a MOS transistor. During a lithography step the patterns defined by one mask are recorded on a radiation sensitive material named photo-resist, which has been deposited on top of the wafer. The resist changes its physical properties according to the dose of radiation. There are several lithographic methods which mainly differ in the type of radiation and thereby in the resolution of the patterns. Normally visible and ultraviolet light is applied, but advanced technologies like extreme ultraviolet lithography (EUV), X-ray lithography (XRL), electron projection lithography (EPL) and ion projection lithography (IPL) have moved from the research and development phase into commercial development for applications down to 35 nm feature size(). However, these techniques still suffer from serious technological problems concerning especially the mask generation, the mask lifetime and the wafer throughput.
To improve the quality of the shape of the pattern on the wafer a post-exposure bake step is applied after the exposure to the radiation. Thereby especially standing wave effects are reduced. Afterwards the resist is developed, either by a wet chemical etching process, by dry plasma etching or by conversion to volatile compounds through the exposure radiation itself. Depending on the type of the resist (positive or negative resist) the pattern defined by the mask is either removed by or remains after the development process.
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