During the production process of an integrated circuit several layers of different materials have to be deposited on the surface of the wafer. These layers become part of the integrated circuit (e.g. polysilicon gate) or serve as intermediate layers (e.g. resist for a lithography step). The deposited materials include doped semiconductors, metals, insulators, dielectrics and organic compounds. Mainly two techniques are applied for the deposition process. On the one hand side physical vapor deposition (PVD) and on the other hand side chemical vapor deposition (CVD) is used.
Physical vapor deposition is performed in a low pressure plasma chamber, where accelerated gas ions sputter particles from a sputter target. Thereby atoms of a well defined composition leave the sputter target towards the deposition target where they cover the surface. Alternatively the particle for deposition can be generated by vaporizing the particle source instead of sputtering it. The drawbacks of the PVD technique is that it has reduced step coverage and therefore reduced capability to uniformly cover arbitrary surface topologies. It is mainly applied to deposit metals for interconnects.
Chemical vapor deposition denotes the precipitation of amorphous, polycrystalline or mono crystalline films on a substrate, from gas phase. It is based on a chemical reaction of a gas mixture on the substrate surface at high temperatures. The gas molecules are converted into a solid which combines with the substrates surface and into a volatile part which is removed from the surface by convection. The most critical aspect of this technique is the requirement of high temperatures, which is sometimes not tolerable. To avoid this problem plasma enhanced chemical vapor deposition can be used, where the chemical reactions are enhanced by radio frequency discharges instead of higher temperatures.
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