Charge Trapping and Variability in CMOS Technologiesat Cryogenic Temperatures

D ISSERTATION

Charge Trapping and Variability
in CMOS Technologies
at Cryogenic Temperatures

zur Erlangung des akademischen Grades

Doktor der technischen Wissenschaften

eingereicht an der Technischen Universität Wien

Fakultät für Elektrotechnik und Informationstechnik

von

J AKOB M ICHL

Matrikelnummer 1302759

Betreut von U NIV.P ROF . D IPL .-I NG . D R . TECHN . T IBOR G RASSER

und A SSISTANT P ROF . D IPL .-I NG . D R . TECHN . M ICHAEL WALTL

Wien, im August 2022

Abstract

Kurzfassung

1 Introduction

1.1 Field-Effect Transistor

1.2 Cryo-CMOS Applications

1.2.1 Quantum Computing

1.2.2 High Performance Computing

1.3 Reliability and Variability Issues in Cryo-CMOS

1.4 Scope and Outline of this Work

I Modeling and Simulation of Defects

2 Defect Candidates

2.1 Interface Defects

2.2 Bulk Oxide Defects

2.2.1 Oxide Defects in Amorphous SiO $_{\mathrm {2}}$ (a-SiO $_{\mathrm {2}}$ )

2.2.2 Oxide Defects in SiON

2.2.3 Oxide Defects in HfO $_{\mathrm {2}}$

3 Charge Transfer Models

3.1 Shockley-Read-Hall Model

3.2 2-State Nonradiative Multiphonon Model

3.2.1 WKB Approximation

3.2.2 Benchmark of the WKB-Based 2-State NPM Approximation

3.2.3 Approximation for Undistorted Potential Energy Curves

3.3 4-State Nonradiative Multiphonon Model

4 Reliability Modeling

4.1 Electrostatics of MOS Structures

4.2 Defect Distribution in the Oxide

II Defect Characterization at Cryogenic Temperatures

5 Measurement Setup and Technologies

5.1 Measurement Setup

5.2 Investigated MOS Transistor Technologies

5.3 Characterization of SmartArray Structures

6 Time-Zero Characterization

6.1 Transfer Characteristics

6.1.1 Subthreshold Swing

6.1.2 Transconductance

6.1.3 Threshold Voltage

6.1.4 ON-State Current

6.2 Capacitance-Voltage Measurements

6.3 Resonant Tunneling at Cryogenic Temperatures

6.4 Variability Characterization

6.4.1 Variability Study on SmartArray A

6.4.2 Variability Study on SmartArray B

7 Charge Noise Characterization

7.1 Experimental Characterization

7.2 1/f Noise

7.3 Random Telegraph Noise

7.3.1 Canny Edge Detector

7.3.2 Otsu’s Method

7.4 RTN in SiON Devices

7.4.1 Temperature and Gate Voltage Variation

7.5 RTN in MoS $_2$ MOSFETs

7.6 RTN in the Resonant Tunneling Region

8 Bias Temperature Instability

8.1 Extended Measure-Stress-Measure Scheme

8.2 Temperature Dependence of BTI Measurements

8.3 TDDS Measurements at Cryogenic Temperatures

9 Conclusion and Outlook

9.1 Conclusion

9.2 Outlook

A Appendix

A.1 WKB Approximation

A.2 Saddlepoint Method

References

List of Publications

Contents