In a damascene process the dielectric is first deposited onto the substrate, which is then patterned and filled by metal deposition. The dual-damascene process is characterized by patterning the vias and trenches, in such a way that the metal deposition fills both at the same time [4,6]. Figure 1.1 depicts the process steps for fabricating a typical copper dual-damascene interconnect.
First, the dielectric is deposited and patterned using standard lithography and etching techniques to form the via and trench. This is followed by the deposition of a diffusion barrier which is typically a Ta-based layer. The diffusion barrier layer has two major functions. First, it avoids that Cu atoms migrate into the interlevel dielectric (ILD), and second, it provides good adhesion to Cu . After the deposition of the diffusion barrier, a thin Cu seed is deposited by physical vapor deposition (PVD) followed by the electroplating of Cu, which fills the via and trench. The excess Cu is removed by a chemical mechanical polishing process (CMP) and an etch stop layer (also called capping layer), typically SiN based, is deposited. In this way, the complete interconnect structure can be produced by repeating these process steps for each level of metallization.