Bibliography

Agostinelli91

V. M. Jr. Agostinelli, H. Shin, and A. F. Jr. Tasch.
A comprehensive model for inversion layer hole mobility for simulation of submicrometer MOSFET's.
IEEE Trans.Electron Devices, vol. 38, pages 151-159, 1991.

Ando82

T. Ando, A.B. Fowler, and F. Stern.
Electronic properties of two-dimensional systems.
Review of Modern Physics, vol. 54, no. 2, pages 437-672, 1982.

Andrieu06

F. Andrieu, T. Ernst, O. Faynot, O. Rozeau, Y. Bogumilowicz, J. M. Hartmann, L. Brevard, A. Toffoli, D. Lafond, and B. Ghyselen.
Performance and physics of sub-50 nm strained Si on Si$_{1-x}$Ge$_{x}$ on insulator (SGOI) nMOSFETs.
Solid-State Electron., vol. 50, pages 566-572, Apr 2006.

Ang04

Kah-Wee Ang, King Jien Chui, V. Bliznetsov, Anyan Du, N. Balasubramanian, Ming Fu Li, Ganesh Samudra, and Yee-Chia Yeo.
Enhanced performance in 50 nm n-MOSFETs with silicon-carbon source/drain regions.
In Proc. Intl. Electron Devices Meeting, pages 1069-1071, 2004.

Ang05

Kah-Wee Ang, King-Jien Chui, Vladimir Bliznetsov, Chih-Hang Tung, Anyan Du, Narayanan Balasubramanian, Ganesh Samudra, Ming Fu Li, and Yee-Chia Yeo.
Lattice strain analysis of transistor structures with silicon-germanium and silicon-carbon source/drain stressors.
Appl.Phys.Lett., vol. 86, no. 9, page 093102, 2005.

Arghavani06

R. Arghavani, L. Xia, H.M. Saad, M. Balseanu, G. Karunasiri, A. Mascarenhas, , and S. E. Thompson.
A reliable and manufacturable method to induce a stress of $> 1$GPa on a p-channel MOSFET in high volume manufacturing.
IEEE Electron Device Lett., vol. 27, no. 2, pages 114-116, 2006.

Ashcroft76

N. W. Ashcroft, and N. D. Mermin.
"Solid state physics,".
W. B. Saunders, Philadelphia, 1976.

Bai04

P. Bai, C. Auth, S. Balakrishnan, M. Bost, R. Brain, V. Chikarmane, R. Heussner, M. Hussein, J. Hwang, D. Ingerly et al.
A 65 nm logic technology featuring 35 nm gate lengths, enhanced channel strain, 8 Cu interconnect layers, low-k ILD and 0.57 $\mu m^2$ SRAM cell.
In Proc. Intl. Electron Devices Meeting, pages 657-660, 2004.

Balslev66

I. Balslev.
Influence of uniaxial stress on the indirect absorption edge in silicon and germanium.
Physical Review, vol. 143, pages 636 - 647, 1966.

Bardeen50

J. Bardeen, and W. Shockley.
Deformation potentials and mobilities in non-polar crystals.
Physical Review, vol. 80, no. 1, pages 72-80, 1950.

Bastard81

G. Bastard.
Superlattice band structure in the envelope-function approximation.
Physical Review B, vol. 24, no. 10, pages 5693-5697, Nov 1981.

Belford01

R.E. Belford.
Uniaxial, tensile-strained Si devices.
J.Electron.Mater., vol. 30, no. 7, pages 807-811, 2001.

Bera06

L.K. Bera, W.Y. Loh, , L.H. Guo, X.W. Zhang, G.Q. Lo, N. Balasubramanian, and D.-L. Kwong.
The impact of uniform strain applied via bonding onto plastic substrate on MOSFET performance.
IEEE Electron Device Lett., vol. 27, no. 1, pages 58-61, 2006.

Bir74

G. L. Bir, and G. E. Pikus.
"Symmetry and strain induced effects in semiconductors,".
Wiley, New York, 1974.

Boeuf01

F. Boeuf, T. Skotnicki, S. Monfray, C. Julien, D. Dutartre, J. Martins, P. Mazoyer, R. Palla, B. Tavel, P. Ribot, E. Sondergard, and A. Sanquer.
16 nm planar NMOSFET manufacturable within state-of-the-art CMOS process thanks to specific design and optimisation.
In Proc. Intl. Electron Devices Meeting, pages 29.5.1-29.5.4, 2-5 Dec. 2001.

Bosi76

S. Bosi, and C. Jacoboni.
Monte Carlo high-field transport in degenerate GaAs.
J.Physics C, vol. 9, pages 315-319, 1976.

Bufler98

F.M. Bufler.
"Full-band monte carlo simulation of electrons and holes in strained Si and SiGe,".
Herbert Utz Verlag, 1998.

Cardona66

Manuel Cardona, and Fred H. Pollak.
Energy-band structure of germanium and silicon: The k·p method.
Physical Review, vol. 142, no. 2, pages 530-543, Feb 1966.

Chan03

V. Chan, R. Rengarajan, N. Rovedo, Wei Jin, T. Hook, P. Nguyen, Jia Chen, E. Nowak, Xiang-Dong Chen, D. Lea, A. Chakravarti, V. Ku, S. Yang, A. Steegen, C. Baiocco, P. Shafer, Hung Ng, Shih-Fen Huang, and C. Wann.
High speed 45nm gate length CMOSFETs integrated into a 90nm bulk technology incorporating strain engineering.
In Proc. Intl. Electron Devices Meeting, pages 77-80, 2003.

Chan05

V. Chan, Ken Rim, Meikei Ieong, Sam Yang, Rajeev Malik, Young Way Teh, Min Yang, and Qiqing.
Strain for CMOS performance improvement.
In Custom Integrated Circuits Conference, 2005. Proceedings of the IEEE 2005, pages 667-674, 2005.

Chang03

L. Chang, Yang-kyu Choi, D. Ha, P. Ranade, Shiying Xiong, J. Bokor, Chenming Hu, and T. J. King.
Extremely scaled silicon nano-CMOS devices.
Proc.IEEE, vol. 91, pages 1860-1873, 2003.

Chelikowsky76

James R. Chelikowsky, and Marvin L. Cohen.
Nonlocal pseudopotential calculations for the electronic structure of eleven diamond and zinc-blende semiconductors.
Physical Review B, vol. 14, no. 2, pages 556-582, Jul 1976.

Chen04

Chien-Hao Chen, T. L. Lee, T. H. Hou, C. L. Chen, C. C. Chen, J. W. Hsu, K. L. Cheng, Y. H. Chiu, H. J. Tao, Y. Jin, C. H. Diaz, S. C. Chen, and M. S. Liang.
Stress memorization technique (SMT) by selectively strained-nitride capping for sub-65nm high-performance strained-Si device application.
In VLSI Symp. Tech. Dig., pages 56-57, 2004.

Cheng71

Y. C. Cheng.
On the scattering of electrons in magnetic and electric surface states by surface roughness.
Surface Science, vol. 27, pages 663-666, Oct 1971.

Cheng01

Zhi-Yuan Cheng, M. T. Currie, C. W. Leitz, G. Taraschi, E. A. Fitzgerald, J. L. Hoyt, and D. A. Antoniadas.
Electron mobility enhancement in strained-Si n-MOSFETs fabricated on SiGe-on-insulator (SGOI) substrates.
IEEE Electron Device Lett., vol. 22, pages 321-323, 2001.

Chidambaram06

P. R. Chidambaram, C. Bowen, S. Chakravarthi, C. Machala, and R. Wise.
Fundamentals of silicon material properties for successful exploitation of strain engineering in modern CMOS manufacturing.
IEEE Trans.Electron Devices, vol. 53, no. 5, pages 944-964, 2006.

Chui07

K. J. Chui, K. W. Ang, N. Balasubramanian, M. F. Li, G. S. Samudra, and Y. C. Yeo.
n-MOSFET with silicon-carbon source/drain for enhancement of carrier transport.
IEEE Trans.Electron Devices, vol. 54, pages 249-256, 2007.

Cohen89

M. L. Cohen, and J. Chelikowsky.
"Electronic structure and optical properties of semiconductors,", volume 75 of Springer Ser. Solid-State Sci.
Springer, Berlin, Heidelberg, 1989.

Connelly03

D. Connelly, C. Faulkner, and D.E. Grupp.
Performance advantage of Schottky source/drain in ultrathin-body silicon-on-insulator and dual-gate CMOS.
IEEE Trans.Electron Devices, vol. 50, no. 5, pages 1340-1345, May 2003.

Conwell67

E.M. Conwell.
"High field transport in semiconductors,", volume 9 of Solid State Physics.
Academic Press, New York, London, 1967.

Cousins87

C. S. G. Cousins, L. Gerward, J. S. Olsen, B. Selsmark, and B. J. Sheldon.
Surface effects in uniaxially stressed crystals: the internal-strain parameters of silicon and germanium revised.
Journal of Physics C Solid State Physics, vol. 20, pages 29-37, January 1987.

Darwish97

M. N. Darwish, J. L. Lentz, M. R. Pinto, P. M. Zeitzoff, T. J. Krutsick, and Hong Ha Vuong.
An improved electron and hole mobility model for general purpose device simulation.
IEEE Trans.Electron Devices, vol. 44, pages 1529-1538, 1997.

Dhar05

S. Dhar, H. Kosina, V. Palankovski, E. Ungersboeck, and S. Selberherr.
Electron mobility model for strained-Si devices.
IEEE Trans.Electron Devices, vol. 52, no. 4, pages 527-533, 2005.

Eneman05

S. Eneman, P. Verheyen, R. Rooyackers, F. Nouri, L. Washington, R. Degraeve, B. Kaczer, V. Moroz, A. De Keersgieter, R. Schreutelkamp, M. Kawaguchi, Y. Kim, A. Samoilov, L. Smith, P. P. Absil, K. De Meyer, M. Jurczak, and S. Biesemans.
Layout impact on the performance of a locally strained p-MOSFET.
In VLSI Symp. Tech.Dig., pages 22-23, 2005.

Esseni03

D. Esseni, and A. Abramo.
Modeling of electron mobility degradation by remote coulomb scattering in ultrathin oxide MOSFETs.
IEEE Trans.Electron Devices, vol. 50, no. 7, pages 1665-1674, 2003.

Esseni04

D. Esseni.
On the modeling of surface roughness limited mobility in SOI MOSFETs and its correlation to the transistor effective field.
IEEE Trans.Electron Devices, vol. 51, no. 3, pages 394-401, 2004.

Ferry97

D. K. Ferry, and S. M. Goodnick.
"Transport in nanostructures,".
Cambridge University Press, 1997.

Fischetti96a

M. V. Fischetti, and S. E. Laux.
Band structure, deformation potentials, and carrier mobility in strained Si, Ge, and SiGe alloys.
J.Appl.Phys., vol. 80, no. 4, pages 2234-2252, 1996.

Fischetti96b

M.V. Fischetti, and S.E. Laux.
Monte Carlo simulation of electron transport in Si: The first 20 years.
In G. Baccarani, and M. Rudan, editeurs, 26th European Solid State Device Research Conference, pages 813-820, Bologna, Italy, 1996. Editions Frontiers.

Fischetti02

M. V. Fischetti, F. Gamiz, and W. Hänsch.
On the enhanced electron mobility in strained-silicon inversion layers.
J.Appl.Phys., vol. 92, no. 12, pages 7320-7324, 2002.

Fischetti03

M. V. Fischetti, and Z. Ren.
Six-band k$\cdot$p calculation of the hole mobility in silicon inversion layers: Dependence on surface orientation, strain, and silicon thickness.
J.Appl.Phys., vol. 94, no. 2, pages 1079-1095, 2003.

Fitzgerald91

E.A. Fitzgerald, Y.H Xie, M.L. Green, D. Brasen, A.R. Kortan, J. Michel, Y.J. Mii, and B. Weir.
Totally relaxed Ge$_x$Si$_{1-x}$ layers with low threading dislocation densities grown on Si substrates.
J.Appl.Phys., vol. 59, no. 7, pages 811-813, 1991.

Friedel89

P. Friedel, M. S. Hybertsen, and M. Schlüter.
Local empirical pseudopotential approach to the optical properties of Si/Ge superlattices.
Physical Review B, vol. 39, no. 11, pages 7974-7977, Apr 1989.

Fritze04

M. Fritze, C.L. Chen, S. Calawa, D. Yost, B. Wheeler, P. Wyatt, C.L. Keast, J. Snyder, and J. Larson.
High-speed Schottky-barrier pMOSFET with f$_T=280$ GHz.
IEEE Electron Device Lett., vol. 25, no. 4, pages 220-222, April 2004.

Ghyselen04

B. Ghyselen, J. M. Hartmann, T. Ernst, C. Aulnette, B. Osternaud, Y. Bogumilowicz, A. Abbadie, P. Besson, O. Rayssac, and A. Tiberj.
Engineering strained silicon on insulator wafers with the Smart CutTM technology.
Solid-State Electron., vol. 48, pages 1285-1296, Aug 2004.

Goodnick85

S. M. Goodnick, D. K. Ferry, C. W. Wilmsen, Z. Liliental, D. Fathy, and O. L. Krivanek.
Surface roughness at the Si(100)-SiO$_{2}$ interface.
Physical Review B, vol. 32, no. 12, pages 8171-8186, Dec 1985.

Goroff63

Iza Goroff, and Leonard Kleinman.
Deformation potentials in silicon. III. Effects of a general strain on conduction and valence levels.
Physical Review, vol. 132, no. 3, pages 1080-1084, Nov 1963.

Haensch06

W. Haensch, E. J. Nowak, and Dennard R. H.
Silicon CMOS devices beyond scaling.
IBM J.Res.Dev., vol. 50, no. 4/5, pages 339-361, 2006.

Hall51

Harry H. Hall, J. Bardeen, and G. L. Pearson.
The effects of pressure and temperature on the resistance of $p-n$ junctions in germanium.
Physical Review, vol. 84, no. 1, pages 129-132, Oct 1951.

Harris04

S. Harris.
"An Introduction to the Theory of the Boltzmann Equation,".
Courier Dover Publications, 2004.

Harrison56

W. A. Harrison.
Scattering of electrons by lattice vibrations in nonpolar crystals.
Physical Review, vol. 104, no. 5, pages 1281-1290, 1956.

Haugerud03

B. M. Haugerud, L. A. Bosworth, and R. E. Belford.
Mechanically induced strain enhancement of metal-oxide-semiconductor field effect transistors.
J.Appl.Phys., vol. 94, no. 6, pages 4102-4107, 2003.

Hensel65

J. C. Hensel, H. Hasegawa, and M. Nakayama.
Cyclotron resonance in uniaxially stressed silicon. II. Nature of the covalent bond.
Physical Review, vol. 138, no. 1A, pages A225-A238, Apr 1965.

Herring56

Conyers Herring, and Erich Vogt.
Transport and deformation-potential theory for many-valley semiconductors with anisotropic scattering.
Physical Review, vol. 101, no. 3, pages 944-961, Feb 1956.

Hinckley90

J.M. Hinckley, and J. Singh.
Influence of substrate composition and crystallographic orientation on the band structure of pseudomorphic Si-Ge alloy films.
Physical Review B, vol. 42, pages 3546-3566, 1990.

Hoeneisen72

B. Hoeneisen, and C. A. Mead.
Fundamental limitations in microelectronics-I.MOS technology.
Solid-State Electron., vol. 15, pages 819-829, July 1972.

Horstmann05

M. Horstmann, A. Wei, T. Kammler, J. Höntschel, H. Bierstedt, T. Feudel, K. Frohberg, M. Gerhardt, A. Hellmich, K. Hempel, J. Hohage, P. Javorka, J. Klais, G. Koerner, M. Lenski, A. Neu, R. Otterbach, P. Press, C. Reichel, M.Trentsch, B. Trui, H. Salz, M. Schaller, H.-J. Engelmann, O. Herzog, H. Ruelke, P. Hübler, R. Stephan, D. Greenlaw, M. Raab, and N. Kepler.
Integration and optimization of embedded-SiGe, compressive and tensile stressed liner films, and stress memorization in advanced SOI CMOS technologies.
In Proc. Intl. Electron Devices Meeting, pages 233-236, 2005.

Hu96

Chenming Hu.
Gate oxide scaling limits and projection.
In Proc. Intl. Electron Devices Meeting, pages 319-322, 1996.

Huang01

L.-J. Huang, J. Chu, S. Goma, C. Emic, S. Koester, D. Canaperi, P. Mooney, S. Cordes, J. Speidell, R. Anderson, and H. Wong.
Carrier mobility enhancement in strained Si-on-Insulator fabricated by wafer bonding.
In VLSI Symp. Tech.Dig., pages 57-58, 2001.

Intel07

Intel.
45nm technology, 2007.
http://www.intel.com/technology/silicon/45nm_technology.htm.

Irie04

H. Irie, K. Kita, K. Kyuno, and A. Toriumi.
In-plane mobility anisotropy and universality under uni-axial strains in n- and p-MOS inversion layers on (100), (110), and (111) Si.
In Proc. Intl. Electron Devices Meeting, pages 225-228, 2004.

Ito00

S. Ito, H. Namba, K. Yamaguchi, T. Hirata, K. Ando, S. Koyama, S. Kuroki, N. Ikezawa, T. Suzuki, T. Saitoh, , and T. Horiuchi.
Mechanical stress effect of etch-stop nitride and its impact on deep submicron transistor design.
In Proc. Intl. Electron Devices Meeting, pages 247-251, 2000.

Jacoboni77

C. Jacoboni, C. Canali, G. Ottaviani, and A. Alberigi Quaranta.
A review of some charge transport properties of silicon.
Solid-State Electron., vol. 20, pages 77-89, Feb 1977.

Jacoboni83

C. Jacoboni, and L. Reggiani.
The Monte Carlo method for the solution of charge transport in semiconductors with applications to covalent materials.
Reviews of Modern Physics, vol. 55, no. 3, pages 645-705, 1983.

Jan05

C.-H. Jan, P. Bai, J. Choi, G. Curello, S. Jacobs, J. Jeong, K. Johnson, D. Jones, S. Klopcic, J. Lin, N. Lindert, A. Lio, S. Natarajan, J. Neirynck, P. Packan, J. Park, I. Post et al.
A 65nm ultra low power logic platform technology using uni-axial strained silicon transistors.
In Proc. Intl. Electron Devices Meeting, pages 60-63, 2005.

Jungemann93

C. Jungemann, A. Edmunds, and W.L. Engl.
Simulation of linear and nonlinear electron transport in homogeneous silicon inversion layers.
Solid-State Electron., vol. 36, no. 11, pages 1529-1540, 1993.

Jungemann03

C. Jungemann, and B. Meinerzhagen.
"Hierarchical Device Simulation: The Monte Carlo Perspective,".
Computational Microelectronics. Springer, 2003.

Kanda91

Yozo Kanda, and Katuhisa Suzuki.
Origin of the shear piezoresistance coefficient $\pi{}_{44}$ of n-type silicon.
Physical Review B, vol. 43, no. 8, pages 6754-6756, Mar 1991.

Kane56

E.O. Kane.
Energy band structure in p-type germanium and silicon.
J.Phys.Chem.Solids, vol. 1, no. 1-2, pages 82-99, 1956.

Karner06

M. Karner, A. Gehring, S. Holzer, M. Pourfath, M. Wagner, H. Kosina, T. Grasser, and S. Selberherr.
VSP-a multi-purpose Schrödinger-Poisson solver for TCAD applications.
In 11th International Workshop on Computational Electronics Book of Abstracts, pages 255-256, 2006.

Khamankar04

R. Khamankar, H. Bu, C. Bowen, S. Chakravarthi, P. R. Chidambaram, M. Bevan, A. Krishnan, H. Niimi, B. Smith, J. Blatchford, B. Hornung, J. P. Lu, P. Nicollian, B. Kirkpatrick, D. Miles, M. Hewson, D. Farber, L. Hall, H. Alshareef, A. Varghese, A. Gurba, V. Ukraintsev, B. Rathsack, J. DeLoach, J. Tran, C. Kaneshige, M. Somervell, S. Aur, C. Machala, and T. Grider.
An enhanced 90nm high performance technology with strong performance improvements from stress and mobility increase through simple process changes.
In VLSI Symp. Tech. Dig., pages 162-163, 2004.

Kittel96

C. Kittel.
"Introduction to solid state physics,".
John Wiley & Sons, 7 edition, 1996.

Kleinman62

Leonard Kleinman.
Deformation potentials in silicon. I. Uniaxial strain.
Physical Review, vol. 128, no. 6, pages 2614-2621, Dec 1962.

Kondo01

M. Kondo, and H. Tanimoto.
An accurate Coulomb mobility model for MOS inversion layer and its application to NO-oxynitride devices.
IEEE Trans.Electron Devices, vol. 48, pages 265-270, 2001.

Kosina00a

H. Kosina, M. Nedjalkov, and S. Selberherr.
A Monte Carlo Method for Small Signal Analysis of the Boltzmann Equation.
J.Appl.Phys., vol. 87, pages 4308-4314, 2000.

Kosina00b

H. Kosina, M. Nedjalkov, and S. Selberherr.
Theory of the Monte Carlo method for semiconductor device simulation.
IEEE Trans.Electron Devices, vol. 47, no. 10, pages 1899-1908, 2000.

Kresse93

G. Kresse, and J. Hafner.
Ab initio molecular dynamics for liquid metals.
Physical Review B, vol. 47, no. 1, pages 558-561, Jan 1993.

Kresse94

G. Kresse, and J. Hafner.
Ab initio molecular-dynamics simulation of the liquid-metal amorphous-semiconductor transition in germanium.
Physical Review B, vol. 49, no. 20, pages 14251-14269, May 1994.

Kresse96a

G. Kresse, and J. Furthmüller.
Efficiency of ab-initio total energy calculations for metals and semiconductors using a plane-wave basis set.
Comput. Mat. Sci., vol. 6, pages 15-50, 1996.

Kresse96b

G. Kresse, and J. Furthmüller.
Efficient iterative schemes for ab initio total-energy calculations using a plane-wave basis set.
Physical Review B, vol. 54, no. 16, pages 11169-11186, Oct 1996.

Kresse99

G. Kresse, and D. Joubert.
From ultrasoft pseudopotentials to the projector augmented-wave method.
Physical Review B, vol. 59, no. 3, pages 1758-1775, Jan 1999.

Kurosawa66

T. Kurosawa.
Monte Carlo calculation of hot electron problems.
J.Phys.Soc.Jap, vol. 21, pages 424-426, 1966.

Laude71

Lucien D. Laude, Fred H. Pollak, and Manuel Cardona.
Effects of uniaxial stress on the indirect exciton spectrum of silicon.
Physical Review B, vol. 3, no. 8, pages 2623-2636, Apr 1971.

Laux88

S. E. Laux, and M. V. Fischetti.
Monte-Carlo simulation of submicrometer Si n-MOSFETs at 77 and 300 K.
IEEE Electron Device Lett., vol. 9, pages 467-469, 1988.

Lee02

Hyunjin Lee, Jongho Lee, and Hyungcheol Shin.
DC and AC characteristics of sub-50-nm MOSFETs with source/drain-to-gate nonoverlapped structure.
IEEE Trans.Nanotechnology, vol. 1, no. 4, pages 219-225, Dec. 2002.

Levinshtein99

M. Levinshtein, S. Rumyantsev, and M. Shur, editeurs.
"Handbook Series on Semiconductor Parameters,", volume 1,2.
World Scientific, London, 1999.

Lim04

Ji-Song Lim, S. E. Thompson, and J. G. Fossum.
Comparison of threshold-voltage shifts for uniaxial and biaxial tensile-stressed n-MOSFETs.
IEEE Electron Device Lett., vol. 25, pages 731-733, 2004.

Lombardi88

C. Lombardi, S. Manzini, A. Saporito, and M. Vanzi.
A physically based mobility model for numerical simulation of nonplanar devices.
IEEE Trans.Computer-Aided Design, vol. 7, pages 1164-1171, 1988.

Lugli85

P. Lugli, and D. K. Ferry.
Degeneracy in the ensemble Monte Carlo method for high-field transport in semiconductors.
IEEE Trans.Electron Devices, vol. 32, pages 2431-2437, 1985.

Luttinger55

J. M. Luttinger, and W. Kohn.
Motion of electrons and holes in perturbed periodic fields.
Physical Review, vol. 97, no. 4, pages 869-883, Feb 1955.

Luttinger56

J. M. Luttinger.
Quantum theory of cyclotron resonance in semiconductors: General theory.
Phys. Rev., vol. 102, no. 4, pages 1030-1041, May 1956.

Maruyama90

T. Maruyama, S. Zaima, Y. Koide, Y. Kanda, and Y. Yasuda.
Anisotropy of piezoresistance in n-channel inversion layers of metal-oxide-semiconductor transistors on (001)Si.
J.Appl.Phys., vol. 68, no. 11, pages 5687-5691, 1990.

Matsumoto02

T. Matsumoto, S. Maeda, H. Dang, T. Uchida, K. Ota, Y. Hirano, H. Sayama, T. Iwamatsu, T. Ipposhi, H. Oda, S. Maegawa, Y. Inoue, , and T. Nishmura.
Novel SOI wafer engineering using low stress and high mobility CMOSFET with $\langle 100 \rangle$ channel for embedded RF/analog applications.
In Proc. Intl. Electron Devices Meeting, pages 663-666, 2002.

Mohta05

N. Mohta, and S. E. Thompson.
Mobility enhancement.
IEEE Circuits and Devices Magazine, vol. 21, pages 18-23, 2005.

Mujtaba95

S. A. Mujtaba.
Advanced mobility models for design and simulation of deep submicron MOSFETs.
PhD thesis, Stanford University, CA, 1995.

Nielsen85

O.H. Nielsen, and R.M. Martin.
Stresses in semiconductors: Ab initio calculations on Si, Ge, and GaAs.
Physical Review B, vol. 32, no. 6, pages 3792-3805, 1985.

Nowotny98

Helmut Nowotny.
Theoretische Festkörperphysik II, 1998.
Vorlesungsskript Technische Universität Wien.

Ota02

K. Ota, K. Sugihara, H. Sayama, T. Uchida, H. Oda, T. Eimori, H. Morimoto, and Y. Inoue.
Novel locally strained channel technique for high performance 55nm CMOS.
In Proc. Intl. Electron Devices Meeting, pages 27-30, 2002.

Ouyang05

Q. Ouyang, M. Yang, J. Holt, S. Panda, H. Chen, H. Utomo, M. Fischetti, N. Rovedo, J. Li, N. Klymko, H. Wildman, T. Kanarsky, G. Costrini, D.M. Fried, A. Bryant, J.A. Ott, M. Ieong, and C.Y. Sung.
Investigation of CMOS devices with embedded SiGe source/drain on hybrid orientation substrates.
In VLSI Symp. Tech. Dig., pages 28-29, 2005.

Pidin04

S. Pidin, T. Mori, K. Inoue, S. Fukuta, N. Itoh, E. Mutoh, K. Ohkoshi, R. Nakamura, K. Kobayashi, K. Kawamura, T. Saiki, S. Fukuyama, S. Satoh, M. Kase, and K. Hashimoto.
A novel strain enhanced CMOS architecture using selectively deposited high tensile and high compressive silicon nitride films.
In Proc. Intl. Electron Devices Meeting, pages 213-216, 2004.

Prange68

R.E. Prange, and T.W Nee.
Quantum spectroscopy of the low-field oscillations in the surface impedance.
Physical Review, vol. 168, pages 779-786, 1968.

Price81

P. J. Price.
Two-dimensional electron transport in semiconductor layers. I. Phonon scattering.
Annals of Physics, vol. 133, pages 217-239, May 1981.

Reggiani73

L. Reggiani, and C. Calandra.
Bloch states mixing in Si conduction band.
Physics Letters A, vol. 43, pages 339-340, Mar 1973.

Reggiani02

S. Reggiani, A. Valdinoci, L. Colalongo, M. Rudan, G. Baccarani, A. Stricker, F. Illien, N. Felber, W. Fichtner, S. Mettler, S. Lindenkreuz, and L. Zullino.
Surface mobility in silicon at large operating temperature.
In Simulation of Semiconductor Processes and Devices, 2002. SISPAD 2002. International Conference on, pages 15-20, 2002.

Rieger93

Martin M. Rieger, and Peter Vogl.
Electronic-band parameters in strained Si$_{1-x}$Ge$_{x}$ alloys on Si$_{1-y}$Ge$_{y}$ substrates.
Physical Review B, vol. 48, no. 19, pages 14276-14287, Nov 1993.

Rim00

K. Rim, J. L. Hoyt, and J. F. Gibbons.
Fabrication and analysis of deep submicron strained-Si n-MOSFET's.
IEEE Trans.Electron Devices, vol. 47, pages 1406-1415, 2000.

Rim02

K. Rim, J. Chu, H. Chen, K. Jenkins, T. Kanarsky, K. Lee, A. Mocuta, H. Zhu, R. Roy, J. Newbury, J. Ott, K. Petrarca, P. Mooney, D. Lacey, S. Koester, K. Chan, D. Boyd, M. Ieong, and H. Wong.
Characteristics and device design of sub-100 nm strained Si n- and p-MOSFETs.
In VLSI Symp. Tech.Dig., pages 98-99, 2002.

Rim03

K. Rim, K. Chan, L. Shi, D. Boyd, J. Ott, N. Klymko, F. Cardone, L. Tai, S. Koester, M. Cobb, D. Canaperi, B. To, E. Duch, I. Babich, R. Carruthers, P. Saunders, G. Walker, Y. Zhang, M. Steen, and M. Ieong.
Fabrication and mobility characteristics of ultra-thin strained Si directly on insulator (SSDOI) MOSFETs.
In Proc. Intl. Electron Devices Meeting, pages 49-52, 2003.

Roldan96

J. B. Roldan, F. Gamiz, J. A. Lopez-Villanueva, and J. E. Carceller.
A Monte Carlo study on the electron-transport properties of high-performance strained-Si on relaxed Si$_{1-x}$Ge$_x$ channel MOSFETs.
J.Appl.Phys., vol. 80, no. 9, pages 5121-5128, 1996.

Roychoudhury80

D. Roychoudhury, and P. K. Basu.
Mobility of electrons in a quantized inversion layer due to phonon scattering.
Physical Review B, vol. 22, no. 12, pages 6325-6329, 1980.

Sabnis79

A. G. Sabnis, and J. T. Clemens.
Characterization of the electron mobility in the inverted $\langle$100$\rangle$ Si surface.
In Proc. Intl. Electron Devices Meeting, volume 25, pages 18-21, 1979.

Sadaka04

M. Sadaka, AV.Y. Thean, A. Barr, D. Tekleab, S. Kalpat, and T. White.
Fabrication and operation of sub-50 nm strained-Si on Si$_{1-x}$Ge$_x$ on Insulator (SGOI) CMOSFETs.
In Proceedings IEEE International SOI Conference, pages 209-211, 2004.

Scott99

G. Scott, J. Lutze, M. Rubin, F. Nouri, and M. Manley.
NMOS drive current reduction caused by transistor layout and trench isolation induced stress.
In Proc. Intl. Electron Devices Meeting, pages 827-830, 1999.

Seitz35

Frederick Seitz.
The theoretical constitution of metallic lithium.
Physical Review, vol. 47, no. 5, pages 400-412, Mar 1935.

Selberherr89

S. Selberherr.
MOS device modeling at 77 K.
IEEE Trans.Electron Devices, vol. 36, pages 1464-1474, 1989.

Sheraw05

C.D. Sheraw, M. Yang, D.M. Fried, G. Costrini, T. Kanarsky, W.H. Lee, V. Chan, M.V. Fischetti, J. Holt et al.
Dual stress liner enhancement in hybrid orientation technology.
In VLSI Symp. Tech.Dig., pages 12-13, 2005.

Shimizu01

A. Shimizu, K. Hachimine, N. Ohki, H. Ohta, M. Koguchi, Y. Nonaka, H. Sato, , and F. Ootsuka.
Local mechanical-stress control (LMC): A new technique for CMOS-performance enhancement.
In Proc. Intl. Electron Devices Meeting, pages 433-436, 2001.

Shirahata92

M. Shirahata, H. Kusano, N. Kotani, S. Kusanoki, and Y. Akasaka.
A mobility model including the screening effect in MOS inversion layer.
IEEE Trans.Computer-Aided Design, vol. 11, pages 1114-1119, 1992.

Shoji97

M. Shoji, Y. Omura, and M. Tomizawa.
Physical basis and limitation of universal mobility behavior in fully depleted silicon-on-insulator Si inversion layers.
J.Appl.Phys., vol. 81, pages 786-794, January 1997.

SIA06

Semiconductor Industry Association SIA.
International Technology Roadmap for Semiconductors - 2006 Update, 2006.
http://www.itrs.net.

Singh93

Jasprit Singh.
"Physics of semiconductors and their heterostructures,".
McGraw-Hill, 1993.

Skotnicki05

T. Skotnicki, J. A. Hutchby, Tsu-Jae King, H. S. P. Wong, and F. Boeuf.
The end of CMOS scaling: toward the introduction of new materials and structural changes to improve MOSFET performance.
IEEE Circuits & Devices, vol. 21, pages 16-26, 2005.

Smirnov03

S. Smirnov, H. Kosina, M. Nedjalkov, and S. Selberherr.
Monte Carlo method for modeling of small signal response including the Pauli exclusion principle.
J.Appl.Phys., vol. 94, no. 9, pages 5791-5799, 2003.

Smith54

Charles S. Smith.
Piezoresistance effect in germanium and silicon.
Physical Review, vol. 94, no. 1, pages 42-49, Apr 1954.

Stanley98

John Stanley, and Neil Goldsman.
New irreducible wedge for scattering rate calculations in full-zone Monte Carlo simulations.
VLSI Design, vol. 8, no. 1-4, pages 413-417, 1998.

Stathis98

J. H. Stathis, and D. J. DiMaria.
Reliability projection for ultra-thin oxides at low voltage.
In Proc. Intl. Electron Devices Meeting, pages 167-170, 1998.

Steegen99

A. Steegen, M. Stucchi, A. Lauwers, and K. Maex.
Silicide induced pattern density and orientation dependent transconductance in MOS transistors.
In Proc. Intl. Electron Devices Meeting, pages 497-500, 1999.

Stern67

Frank Stern, and W. E. Howard.
Properties of semiconductor surface inversion layers in the electric quantum limit.
Physical Review, vol. 163, no. 3, pages 816-835, Nov 1967.

Sverdlov06

V. Sverdlov, E. Ungersboeck, H. Kosina, and S. Selberherr.
Orientation dependence of the low field mobility in double- and single-gate SOI FETs.
Proceedings ESSDERC 2006, pages 178-181, 2006.

Takagi94

S. Takagi, A. Toriumi, M. Iwase, and H. Tango.
On the Universality of Inversion Layer Mobility in Si MOSFET's: Part II-effects of surface orientation.
IEEE Trans.Electron Devices, vol. 41, no. 12, pages 2363-2368, 1994.

Thompson04

S.-E. Thompson, M. Armstrong, C. Auth, M. Alavi, and M. Buehler.
A 90-nm logic technology featuring strained-silicon.
IEEE Trans.Electron Devices, vol. 51, no. 11, pages 1790-1797, 2004.

Thompson06

S.-E. Thompson, G. Sun, Y.S. Choi, and T. Nishida.
Uniaxial-process-induced strained-Si: Extending the CMOS Roadmap.
IEEE Trans.Electron Devices, vol. 53, no. 5, pages 1010-1020, 2006.

Tinkham64

M. Tinkham.
"Group theory and quantum mechanics,".
McGraw-Hill, New York, 1964.

Tosic81

T. I. Tosic, D. A. Tjapkin, and M. M. Jevtic.
Mobility of majority carriers in doped noncompensated silicon.
Solid-State Electron., vol. 24, pages 577-582, Jun 1981.

Tsutsui05

G. Tsutsui, M. Saitoh, T. Saraya, T. Nagumo, and T. Hiramotoy.
Mobility enhancement due to volume inversion in (110)-oriented ultra-thin body double-gate nMOSFETs with body thickness less than 5 nm.
In Proc. Intl. Electron Devices Meeting, pages 747-750, 2005.

Uchida03

K. Uchida, J. Koga, and S. Takagi.
Experimental study on carrier transport mechanisms in double- and single-gate ultrathin-body MOSFETs - Coulomb scattering, volume inversion, and $\delta$TSOI-induced scattering.
In Proc. Intl. Electron Devices Meeting, pages 805-808, 2003.

Uchida05

K. Uchida, T. Krishnamohan, K.C. Saraswat, and Y.Nishi.
Physical mechanisms of electron mobility enhancement in uniaxial stressed MOSFETs and impact of uniaxial stress engineering in ballistic regime.
In Proc. Intl. Electron Devices Meeting, pages 135-138, 2005.

Ungersboeck06a

E. Ungersboeck, S. Dhar, G. Karlowatz, H. Kosina, and S. Selberherr.
Physical modeling of electron mobility enhancement for arbitrarily strained silicon.
In 11th International Workshop on Computational Electronics Book of Abstracts, pages 141-142, 2006.

Ungersboeck06b

E. Ungersboeck, and H. Kosina.
Monte Carlo study of electron transport in strained silicon inversion layers.
J.Comput.Electronics, vol. 5, no. 2-3, pages 79-83, July 2006.

Uppal04

S. Uppal, M. Bollani, A.F.W. Willoughby, J.M. Bonar, R.J.H. Morris, and M.G. Dowsett.
Diffusion of ion-implanted boron in high Ge content SiGe alloys.
In Electrocemical Society Proceedings, volume 07, pages 159-165, 2004.

Van de Walle86

Chris G. Van de Walle, and Richard M. Martin.
Theoretical calculations of heterojunction discontinuities in the Si/Ge system.
Physical Review B, vol. 34, no. 8, pages 5621-5634, Oct 1986.

Vasileska97

D. Vasileska, and D. K. Ferry.
Scaled silicon MOSFET's: universal mobility behavior.
IEEE Electron Device Lett., vol. 44, pages 577-583, 1997.

Vasileska00

D. Vasileska, and Z. Ren.
SCHRED 2.0 User's Manual.
http://www.nanohub.org, 2000.

Venturi89

F. Venturi, R.K. Smith, E.C. Sangiorgi, M.R. Pinto, and B. Riccó.
A general purpose device simulator coupling poisson and Monte Carlo transport with applications to deep submicron MOSFET's.
IEEE Trans.Computer-Aided Design, vol. 8, no. 4, pages 360-369, 1989.

VMC2.006

VMC2.0.
Vienna Monte Carlo 2.0 User's Guide.
Institut für Mikroelektronik, http://www.iue.tuwien.ac.at/software, Technische Universität Wien, Austria, 2006.

Wallmark75

J. T. Wallmark.
Fundamental physical limitations in integrated electronic circuits.
Inst. Phys. Conf. Ser., vol. 25, pages 133-167, 1975.

Wang03

Y. G. Wang, D. B. Scott, J. Wu, J. L. Waller, J. Hu, K. Liu, and V. Ukraintsev.
Effects of uniaxial mechanical stress on drive current of 0.13 $\mu$m MOSFETs.
IEEE Trans.Electron Devices, vol. 50, pages 529-531, 2003.

Welser92

J. Welser, J.L. Hoyt, and J.F. Gibbons.
NMOS and PMOS transistors fabricated in strained silicon/relaxed silicon-germanium structures.
In Proc. Intl. Electron Devices Meeting, pages 1000-1002, 1992.

Welser94

J. Welser, J.L. Hoyt, and J.F. Gibbons.
Electron Mobility Enhancement in Strained-Si N-Type Metal-Oxide-Semiconductor Field-Effect Transistors.
IEEE Electron Device Lett., vol. 15, no. 3, pages 100-102, 1994.

Yamakawa96

S. Yamakawa, H. Ueno, K. Taniguchi, C. Hamaguchi, K. Miyatsuji, K. Masaki, and U. Ravaioli.
Study of interface roughness dependence of electron mobility in Si inversion layers using the Monte Carlo method.
J.Appl.Phys., vol. 79, no. 2, pages 911-916, 1996.

Yang04

H. S. Yang, R. Malik, S. Narasimha, Y. Li, R. Divakaruni, P. Agnello, S. Allen, A. Antreasyan, J. C. Arnold, K. Bandy et al.
Dual stress liner for high performance sub-45nm gate length SOI CMOS manufacturing.
In Proc. Intl. Electron Devices Meeting, pages 1075-1077, 2004.

Yang06

M. Yang, V.W.C. Chan, K.K Chan, L. Shi, D.M. Fried, J.H. Stathis et al.
Hybrid-orientation technology (HOT): Opportunities and challenges.
IEEE Trans.Electron Devices, vol. 53, pages 965-978, 2006.

Yu03

P. Yu, and M. Cardona.
"Fundamentals of Semiconductors,".
Springer, 2003.

Zhang05

D. Zhang, B.Y. Nguyen, T. White, B. Goolsby et al.
Embedded SiGe S/D PMOS on thin body SOI substrate with drive current enhancement.
In VLSI Symp. Tech. Dig., pages 26-27, 2005.

Zhu04

Shiyang Zhu, H.Y. Yu, S.J. Whang, J.H. Chen, Chen Shen, Chunxiang Zhu, S.J. Lee, M.F. Li, D.S.H. Chan, W.J. Yoo, A. Du, C.H. Tung, J. Singh, A. Chin, and D.L. Kwong.
Schottky-barrier S/D MOSFETs with high-k gate dielectrics and metal-gate electrode.
IEEE Electron Device Lett., vol. 25, no. 5, pages 268-270, May 2004.

E. Ungersboeck: Advanced Modelling Aspects of Modern Strained CMOS Technology