Publications Santo Papaleo
8 recordsPublications in Scientific Journals
1. | Papaleo, S., Zisser, W. H., Singulani, A. P., Ceric, H., Selberherr, S. (2016). Stress Evolution During Nanoindentation in Open TSVs. IEEE Transactions on Device and Materials Reliability, 16(4), 470–474. https://doi.org/10.1109/tdmr.2016.2622727 (reposiTUm) | |
Talks and Poster Presentations (with Proceedings-Entry)
6. | Papaleo, S., Ceric, H. (2016). A Finite Element Method Study of Delamination at the Interface of the TSV Interconnects. In 2016 IEEE International Reliability Physics Symposium (IRPS), Phoenix. https://doi.org/10.1109/irps.2016.7574626 (reposiTUm) | |
5. | Papaleo, S., Rovitto, M., Ceric, H. (2016). Mechanical Effects of the Volmer-Weber Growth in the TSV Sidewall. In 2016 IEEE 66th Electronic Components and Technology Conference (ECTC), Las Vegas, NV, USA. https://doi.org/10.1109/ectc.2016.19 (reposiTUm) | |
4. | Papaleo, S., Zisser, W., Ceric, H. (2015). Effects of the Initial Stress at the Bottom of Open TSVs. In Proceedings of the IEEE International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA), Singapore. (reposiTUm) | |
3. | Papaleo, S., Zisser, W., Ceric, H. (2015). Factors That Influence Delamination at the Bottom of Open TSVs. In 2015 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD), Washington, DC, United States. https://doi.org/10.1109/sispad.2015.7292350 (reposiTUm) | |
2. | Papaleo, S., Zisser, W., Singulani, A., Ceric, H., Selberherr, S. (2014). Stress Analysis in Open TSVs After Nanoindentation. In Abstracts (pp. 39–40), Thun, Switzerland. (reposiTUm) | |
1. | Papaleo, S., Zisser, W., Singulani, A., Ceric, H., Selberherr, S. (2014). Stress Evolution During the Nanoindentation in Open TSVs. In Abstracts of 13th International Workshop on Stress-Induced Phenomena in Microelectronics (p. 44), Kyoto, Japan. (reposiTUm) | |
Doctor's Theses (authored and supervised)
1. | Papaleo, S. (2016). Mechanical Reliability of Open Through Silicon via Structures for Integrated Circuits Technische Universität Wien. https://doi.org/10.34726/hss.2016.41167 (reposiTUm) | |