Projects Details

Advanced Developments for 0.25µm CMOS Technologies II

  
Project Number E8002 ADEQUAT-2   
Start of Project 31. January 1994
End of Project 29. September 1995
Additional Information Entry in CORDIS

Abstract

The goal of the ADEQUAT-2 project was to develop the following process steps and process modules for the sub-0.5µm CMOS technolo­gy generations for logic applications:
- interconnects for 0.35µm CMOS
- device modules for 0.25µm CMOS
The feasibility for the process modules (of generation n) was to be tested and their characteristics stabilised in CMOS batches (of generation n-1). Furthermore, the process know-how was to be transferred to industrial pilot lines with focus on manufacturability and cost issues.

Major Milestones
• Lithography and etching processes for 0.35µm back-end developed.
• Process steps and modules for 0.35µm interconnects documented.
• Lithography and etching processes for 0.25µm front-end developed.
• Front-end processing steps and modules for 0.25µm CMOS developed.
• Fully functional shift register with over 60.000 transistors fabricated using 0.25µm design rules up to metal 1.
• Report on the characterization of front-end process steps and modules for 0.25µm CMOS technology.

ADEQUAT-2 is a follow-up project to ADEQUAT.

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