2.1 Overview

The semiconductor industry is starting from the product idea the following sequential steps occur in a standard integrated circuit development and production flow [12].

1. Development: Starting from the product idea, the electronic contents of the overall system are developed, leading into a schematic of the electronic circuitry. For digital circuitry this development process is similar to writing a software program by using Very High Speed Integrated Hardware Description Language (VHDL) as a abstract description of the digital block. The development of a digital block starts with the specification (operation and timing) and the subsequent description of this specification via a model in VHDL.
2. Design: The integrated circuit is designed starting from the schematic, and taking into account the special demands of integrated circuits (crosstalk, common substrate, etc.). It is now standard to use ECAD tools to simulate the behaviour of a design as an integrated circuit by using detailed circuit simulation models and design rules, which are specific to a process family (technology node) [13],[14].
3. Layout: The resulting integrated circuit is drawn as a layout on the specific layers which are given by the semiconductor process family (technology node). The combination of multiple layers, like implantation masks and etch masks, define the shape and functionality of the electronic devices in the integrated circuit [15],[16],[17].
4. Mask-Shop: The layout is post processed to take into account process induced size variations (layer biasing) and constraints on combination of layers (logical combination). The physical mask layers are written from this data by using laser- [18] or e-beam [19] equipment.
5. The wafer start material is released at the beginning of the process flow into fabrication [20]. In the following these wafers are subject to numerous single process steps like ion-implantation, deposition and etching of semiconductor, dielectric, and metallic materials, furthermore diffusion of dopants, and oxidation and lithography to structure deposited layers using the previously fabricated mask reticles.
6. After leaving the fabrication the now functional integrated circuits are tested electrically. Firstly on single device level on process control monitors (PCM's), secondly on full device level (wafer sort). These tests select the functioning parts for further processing.
7. Scribing into pieces and packaging of the single circuits.
8. Electrical functionality test of the packaged pieces.

The overall processing chain is shown in Figure 2.1.

Figure 2.1: Processing chain of integrated circuit production

The ECAD simulation tools in Subject 1, Subject 2, and Subject 3 are already closely integrated into the development chain [21] and are therefore very efficient.

Packaging simulation is not subject to this work, however, tools [22], [23] are used to analyse new packages with respect to electromagnetic field, stress, and self heating.

For Subject 4 to Subject 6 good simulation solutions exist for the single process step (e.g. SIGMA-C or PROLITH for lithography and mask fabrication step simulation, TCAD Tools from Synopsys and Silvaco for the process- and device-simulation steps), which are sufficient for most of the two-dimensional process- and device-simulation applications.

However, the set-up of these TCAD-simulators is highly complicated and time consuming. Changes in fabrication procedures like parameter optimization of process conditions are not reflected in simulation with the traditional way of defining this set-up by hand. Therefore the simulation flow definitions become asynchronous to the semiconductor fabrication very quickly.

The main concept to be considered is to match the simulation methodology as closely as possible to the fabrication methodology in an automatic (or at least semi-automatic) way. The resulting work flow and the main application areas for TCAD integration into fabrication can be seen in Figure 2.2.

Figure 2.2: Structure of the semiconductor process flow and its mirror image the TCAD simulation flow

In the following the main aspects of the parts of this implementation are outlined.