1.4 Thermal Properties and Power Density

The decreasing feature sizes and the increasing integration densities go hand in hand with the increase of power dissipation per unit area. Since the output specifications of electrical circuit designs are kept within the same range of magnitude for backward compatibility, the local power density increases more than exponentially as the device sizes shrink (cf. Figure 1.1 and ITRS [11]).

In the early stages of the microelectronic age, the performance was mainly determined by the achievable electrical properties. Today's microelectronic devices are determined also by thermal issues. The heat produced on the chip has to be transported to the heat sink at the surface of the chip. Since modern chip designs consist of multiple metalization layers, there is the Si substrate on the bottom which is normally thermally connected to a heat sink but at the top side there are only thermally insulating layers which include also the ceramic or plastic package on top of the chip. Hence, the heat is transported through the metal layers because their thermal conductivity is much higher than the thermal conductivity of the insulation layer on the lower side. Due to the heat transport through the metal layers, the metal lines heat up. This leads to a global warming of the chip which means in the worst case that a single hot spot at one side could determine the temperature of the whole chip, if the heat transport is unfavorably arranged or designed.

To overcome this particular type of design problem, stationary and transient thermal effects have to be included foremost into the device and process simulation models [37,38,39]. Since the major goal of TCAD applications in the industrial design flow is to obtain sufficiently accurate simulation results in reasonable time, simulation models have to cover the most dominant effects. Many of these effects have been described earlier in a fundamental way. If the physical models are still not accurate enough or are computationally too expensive, parameterized compact models have to be introduced and calibrated to obtain sufficiently accurate results in reasonable time.

The ideal thermal requirements for today's microelectronic devices can be briefly summarized as follows. First, the thermal conductivity of dielectrics or their heat capacitance should be adjustable by choosing different materials which are compatible with other involved metals in terms of fabrication and material interactions. The optimum for the designer engineers would be to choose the materials for interconnects and contacts according to their needs, for instance in terms of electrical or thermal conductivity or according to the material interaction properties. However, since the materials within a certain technology node cannot be arbitrarily chosen, the design engineers have to decide on the best materials according to several technology-dependent constraints, e.g. the thermal budget for the fabrication process, the electrical and thermal load capacity, and other limits which occur at device fabrication processes or during device operation.

Once the materials are chosen, the device can be finally designed. However, after process and device simulations, the results proof whether the designs of the device structures and its chosen materials yield the desired performance and characteristics. Without simulation, the procedure of producing a test wafer to measure the characteristics takes several weeks instead of few minutes or hours. At this stage of development, thermal effects like self-heating, heat conduction, or heat accumulation are commonly neglected or have mostly not been considered correctly using standard design tools. Hence, without electro-thermal simulation or early measures of test devices, unintentional problems might occur within the prototype phase.

Stefan Holzer 2007-11-19