Process Simulation Tools

Process simulation tools provide the functionality to investigate and depict the different process steps in semiconductor device fabrication. Moreover, this category includes also the extraction of key parameters such as parasitic parameters like resistivity, cross capacitances, inductances, delay time on interconnect lines.

• LAYCONV [39] has been developed at the Institute for Microlelectronics and provides the capabilities to read several types of mask layers, e.g. CIF and GDS II, and to include them into the process simulation flow. This software additionally offers a proximity approximation feature for mask layers to account for the uncertainty of the optical rays during the development of the photo resist layers.
• TOPO3D [296] has been developed at the Institute for Microlelectronics and is a three-dimensional topography simulator that mainly uses the level-set approach for the computational expensive description of the moving surface during etching and deposition steps.
• TSUPREME4 [297] is a two-dimensional commercial process simulator from SYNOPSYS which is an advancement of the original simulator code developed at Stanford University [298,299] and at TMA [300]. This software tool mainly simulates the physical behavior of the dopants in a two-dimensional cut layer through a semiconductor device structure during its fabrication.
• LIGAMENT [40] is a commercial process simulation framework from SYNOPSYS that allows to call external process simulation tools and to apply analytically described process steps, e.g. an implantation of an analytical doping profile.
• SPROCESS [40] is a commercial process simulator from SYNOPSYS that offers self-consistent physical multidimensional modeling for silicon and compound semiconductor process technologies.
• MCIMPL-II [301] is three-dimensional Monte Carlo simulation tool, which has been developed at the Institute for Microlelectronics. In this simulation tool the entire implantation process can be described on a detailed microscopic level.
• STAP [92,39] is a three-dimensional interconnect simulator based on finite elements, which has been developed at the Institute for Microlelectronics. This simulation tool provides key parameter extraction: resistance, capacitance, and inductance.