Chapter 8
Conclusions and Outlook

In the course of this work we have considered the most important reliability aspects in modern nanoscale Si MOSFETs and new transistors with graphene and MoS₂ channels. While in the former case scaling of device dimensions leads to a significant impact of individual defects on device performance, in the latter case one has to deal with a continuous number of charged defects. Below the main results of this work are summarized.

• The impact of individual defects on the performance of nanoscale Si MOSFETs in the presence of random dopants was studied in detail. The results of our TCAD simulations showed that the impact of a single charged trap on the threshold voltage shift versus drain bias dependence is strongly correlated with the lateral position of this trap. Based on this, a precise algorithm allowing us to evaluate the lateral trap position directly from TDDS data was developed. While our technique fully accounts for the impact of random dopants, the uncertainty of the lateral trap position evaluation does not exceed several percents of the channel length. Moreover, the accuracy was shown to increase for devices with smaller channel lengths.
• A detailed study of PBTI and NBTI in GFETs was first performed. It was shown that the BTI dynamics in GFETs can be reasonably fitted with the CET map model and universal relaxation model known from Si technologies. This allowed us to conclude that the mechanisms of BTI degradation and recovery in GFETs and Si MOSFETs are similar. However, no permanent component of BTI was found for GFETs, likely due to the absence of dangling bonds.
• The presence of HCD was first reported for GFETs. Contrary to Si technologies, HCD in GFETs was found to be recoverable and more similar to BTI. For some stress conditions, this allowed us to capture the dynamics of HCD in GFETs with the CET map and universal relaxation models.
• The mechanisms of HCD in GFETs were classified with respect to the polarities of bias and hot carrier stress components. A detailed experimental analysis of all HCD issues was performed, while qualitative simulations using the DD model adjusted for GFETs allowed for an interpretation of the results. In particular, it was found that PBTI and HCD stress components acting in conjuction lead to a non-trivial recovery of the degradation accompained with thermally activated mobility increase. Moreover, variations of the charged trap density and mobility resulting from HCD are correlated, while being consistent with previously reported attractive/repulsive scattering asymmetry.
• The first detailed characterization of hysteresis and BTI was performed for MoS₂ FETs with SiO₂ and hBN insulators. It was shown that the devices studied within this work exhibit better reliability compared to their previously reported counterparts. Namely, the hysteresis and BTI shifts in our MoS₂ devices are smaller. Furthermore, use of hBN as a gate insulator improves the device reliability at room temperature, although it considerably decays at higher temperatures.
• The first attempt to reproduce the BTI degradation dynamics in MoS₂ FETs with SiO₂ using the four-state NMP model coupled with the DD model was performed. The demonstrated proof of concept opens wide possibilities for modeling of reliability characteristics of next-generation 2D FETs using the simulators developed for Si technologies.

The trap location technique developed in this work can be very useful in application by industrial specialists when conducting primary characterization of nanoscale Si MOSFETs. Moreover, this method is potentially suitable to be applied for characterization of future 2D FETs, when the dimensions of these devices become small enough. At the same time, the information about reliability of the devices with graphene and MoS₂ obtained in this dissertation can be very useful for the understanding of future trends in 2D technologies. Moreover, the described experimental and simulation approaches can be applied to capture the reliability of the transistors with other 2D materials, such as phosphorene, silicene and germanene, which will be studied in the near future. Especially important is that the reliability characteristics of 2D FETs can be predicted using the models previously developed for Si technologies. This allows us to adjust the conventional Si device simulators, in particular those developed at our institute, to the case of 2D devices. Hence, one of the main directions for future research on 2D materials can be a more accurate adjustment of the four-state NMP and DD models for transistors with various 2D materials from the “beyond graphene” range. Another important step could be realization and a detailed reliability study of top-gated FETs with MoS₂, phosphorene and other 2D channels. Also, attention needs to be paid to devices with 2D insulators, such as hBN. Advanced modeling of their reliability coupled with experimental analysis would present a very interesting research topic.