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Next: 1.1.2 Process Integration Up: 1.1 Semiconductor Technology Previous: 1.1 Semiconductor Technology

1.1.1 Unit Processes

Lithography. Lithography is the process of defining features on the wafer according to a specified pattern or mask level. A radiation sensitive material commonly called resist is used to record the pattern. The resist may be positive or negative tone depending if it is removed or remains after the development of the irradiated regions. The development may be carried out with wet chemical etching, by dry plasma etching or by conversion to volatile compounds through the exposure radiation itself. The exposure radiation may be in the form of visible, deep ultraviolet or X-ray photons, or electron or ion beams of particles. The exposure can be made by a parallel process such as contact or projection printing from a mask or by serially scanning of one or more beams. Among all these technologies optical lithography holds the leading position in today's semiconductor technology mainly because of its high wafer throughput. In Chapter 2 the optical lithography process will be described in detail. Also a few notes on non-optical lithography techniques can be found there.

Etching. Etching refers to the process of transferring the resist image generated by lithography into the layer underneath. Etching can be done by chemical attack, physical damage, or some combination of the two. Chemical or wet etches use liquid etching agents that are applied to the wafer surface. This purely chemical process has serious drawbacks like a lack of anisotropy, poor process control, and excessive particle contamination. However, wet etching can be highly selective and often does not damage the substrate. For this reason it continues to be used for a wide range of non-critical fabrication tasks. Physical or dry etching is on the contrary a highly anisotropic etching process and thus capable of transferring small features. A drawback is its low selectivity to different materials. Physical etching is performed in a plasma environment. The gases are used to remove material by momentum transfer or to assist a chemical reaction. The amount of the physical and chemical attack is determined by the pressure inside the chamber. For very low chamber pressure the process is called ion milling. The etch mechanism is a purely physical one and the selectivity is poor. Reactive ion etching is performed under increasing chamber pressure, which results in a more selective process due to the increased amount of the chemical reaction. Plasma etching uses very high chamber pressures. The dominant etching mechanism is a chemical one and the selectivity is very high.

Oxidation. Oxidation is the process of converting silicon on the wafer surface into silicon dioxide. The conversion already starts at room temperature. The resulting very thin oxide film is called native oxide. The oxidation rate can be accelerated by subjecting the wafer to oxygen or water vapor at elevated temperature. The growth rate of the thermally grown oxide depends, beside the temperature, on the pressure inside the oxidation furnace, the crystal orientation, doping level and impurity contamination of the silicon substrate as well as on the stress due to a nonplanar wafer topography. The thermally grown silicon dioxide has excellent mechanical and electrical properties. It is used as device to device isolation, to act as gate oxide in Metal Oxide Semiconductor (MOS) structures and to serve as mask against dopant implantation. The ability of silicon to form a high quality silicon dioxide has been a crucial factor in the development of ICs.

Deposition. The controlled deposition of thin organic and inorganic films is another important step in the manufacturing of ICs. The films are deposited to remain as an inherent part of the device structure, or to constitute intermediate layers that are used for particular processing steps and are removed later on. The methods for the deposition of thin films fall into three broad categories: chemical vapor deposition, physical vapor deposition, and overlapping techniques which combine the previous ones. Chemical vapor deposition is based on the chemical reaction or decomposition of a gas mixture at elevated temperature and low pressure on the wafer surface or in its vicinity. Examples for deposited films are single crystal and polycrystalline silicon, silicon dioxide and nitride, various silicate glasses and compound semiconductors. A major disadvantage of the thermally activated chemical vapor deposition processes is the associated high temperature. To overcome this limitation the chemical reactions can be physically enhanced. The deposition can then be performed at low temperature. Examples for that are photo-, plasma-, and electron cyclotron resonance plasma deposition. Pure physical vapor deposition is mainly constrained to metalization as it lacks step coverage problems.

Metalization. In modern semiconductor technology metalization becomes one of the crucial processing steps as circuit speed as well as package density are determined by the quality of the interconnects and contacts. Aluminum, tungsten and nowadays also copper are used as metallic conductor materials. Heavily doped polysilicon is used as nonmetallic conductor and lightly doped polysilicon as resistor. Isolation between multilevel interconnect structures is achieved by chemical vapor deposition of doped silicon oxide films. The metal films are deposited by physical vapor deposition methods. Evaporation has problems with step coverage, alloy formation and radiation damage. Some of the problems can be overcome by sputtering techniques. Chemical vapor deposition of metal films as an alternative is still under development. One severe problem results from the migration of metal particles. The migration can be caused electrically by current flow or by stress inside the deposited metal film. Another problem arises from metal corrosion in the presence of moisture.

Ion implantation. Ion implantation is the most widely applied doping technique in modern semiconductor technology as it allows for vertically shallow and retrograde as well as laterally well defined dopant profiles. Ionized dopant atoms are accelerated through an electrostatic field, strike the surface and penetrate into the wafer. The dose can be tightly controlled by measuring the ion current. The penetration depth is adjusted by the acceleration energy. As both dose and depth can be monitored electrically ion implantation is highly controllable and reproducible. A subsequent thermal processing step is necessary for two reasons. Firstly, the implanted dopant atoms reside on interstitial sites inside the crystal lattice and are thus electrically inactive. Secondly, the implanted ions displace silicon atoms and thereby cause implantation damage. A subsequent thermal treatment is necessary to heal as much as possible of the implantation damage and to activate the dopants by moving them on substitutional lattice sites. This so called annealing process limits the possible resolution of the implanted profile. Rapid thermal annealing at a very high temperature allows to repair the damage with minimal dopant movement. When implanting into a single crystal another problem arises due to the anisotropy of the target. Along the major crystal axis the implanted dopants collide with fewer target atoms and can thus penetrate deeper into the crystal. This phenomenon referred to as channeling can be significantly reduced by slightly tilting the ion beam against the preferred orientations.

Diffusion. Diffusion is the transport of matter caused by a gradient of the electro-chemical potential. In semiconductor manufacturing diffusion of dopants occurs during any high temperature processing step. The dopant redistribution can thus be intentional or a parasitic side effect of some other thermal process. In either event, it must be controlled and monitored. Desired functions are the annealing of implanted ions already described and the introduction of dopants into the wafer from a chemical vapor source or a predeposited doped layer. Depending on the impurity concentration with respect to the intrinsic carrier concentration the diffusion process is called intrinsic or extrinsic. In the latter case the built-in potential influences the dopant movement. Other effects are the oxidation-enhanced and nitridation-retarded diffusion behavior of some dopants due to surface reactions. During an annealing step the diffusion strongly depends on the initial point defect distribution after ion implantation, which leads to a transient enhancement. At high concentration the solubility limit of the dopant can be approached and the impurities form non-mobile clusters or precipitates. The diffusion process is then decreased and not all dopants are electrically active. The exact control of these anomalous diffusion phenomena is a very critical issue during the manufacturing of semiconductor devices.

next up previous contents
Next: 1.1.2 Process Integration Up: 1.1 Semiconductor Technology Previous: 1.1 Semiconductor Technology
Heinrich Kirchauer, Institute for Microelectronics, TU Vienna