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5.5 Redundant Via Structure

In order to design reliable interconnects against electromigration, a big effort has been put into investigating materials which produce preferable properties. However, another strategy which is commonly used to improve the interconnect resistance against electromigration is the introduction of specific geometrical features, such as material reservoirs [21,165,166] and redundant vias [19,167]. Using two or more via contacts between interconnect levels has shown to be a very promising strategy for preventing stressmigration [19,167] and electromigration [19]. Therefore, in this section some simulation results for interconnect structures containing two vias, as shown in Figure 5.29, are presented. In this way, the impact of the redundant via on the interconnect behavior regarding electromigration can be analyzed.

Figure 5.29: Interconnect structure with redundant via.

Figure 5.30 shows the vacancy distribution in a double via structure. Here, the simulations are carried out for a current density of 8 MA/cm$ ^2$, and the equilibrium vacancy concentration is $ 9.0\times 10^{15}$ cm$ ^{-3}$. The vacancy concentration is higher underneath the vias, as expected, since the electric current drives vacancies towards the vias (the current flows from right to left). Also, vacancies are concentrated at the interface between the copper and the capping layer, as this interface is the fastest diffusivity path. The vacancy concentration located under the outer (left) via is somewhat higher than the concentration under the inner (right) via, where current crowding occurs. These results indicate that, in this case, current crowding does not suffice to induce a higher vacancy flux divergence at the inner via. The higher vacancy concentration at the outer via is a consequence of a lower resistance for current flow along this path.

Figure 5.30: Vacancy distribution in the double via structure (in cm$ ^{-3}$).

The corresponding stress development is shown in Figure 5.31. Note that a peak of hydrostatic stress develops at the outer via, as well as at the innermost via. The stress magnitude under the outer via is, however, somewhat higher, which is a consequence of the higher vacancy concentration at this region, as seen in Figure 5.30. These peaks are exactly located at the intersection of the copper with the capping and the barrier layer. Since the stress magnitude under both vias is similar, a void can nucleate under any of them. Void nucleation will take place, wherever the proper conditions are found, that is, at the site having the weakest adhesion between copper, capping, and barrier layer.

Figure 5.31: Hydrostatic stress under the vias in a double via structure (in MPa). The stress peak is located under the outer via at the intersection between copper, capping layer, and barrier layer.

The impact of the distance between the vias on the maximum stress build-up is shown in Figure 5.32. The stress developed in the interconnect with redundant via is higher than that developed in the single via structure. The introduction of a second via reduces the overall interconnect resistance. As the voltage applied at the terminals of the interconnect is the same, the reduction of the interconnect resistance leads to an increase of the electric current. Consequently, the driving force for material transport along the line is increased, and more vacancies concentrate under the outer via of the redundant via structure, producing a higher stress. Another observation is that the stress also increases as the distance between the vias becomes larger. This is explained by the same argument as above. The larger is the distance between the vias, the smaller is the total line resistance, so that a higher current flows.

In order to avoid the current change, a constant current is applied to the interconnect structures. The stress build-up for the single and for the redundant via structures is presented in Figure 5.33. The second via provides an additional path for current conduction, so that the current flow through each via is smaller than the current flow through the single via. Therefore, the developed stress is smaller for the structures with the redundant via. Moreover, the stress magnitude is reduced as the distance between the vias increases. The increase of the distance between the vias corresponds to a decrease of the length between the innermost via and the end of the line, so that a smaller stress is needed to produce a gradient which counters the electromigration flux.

Figure 5.32: Maximum hydrostatic stress build-up under the outer via as a function of the distance between the vias for a constant voltage applied at the terminals of the interconnect.

Figure 5.33: Stress development under the outer via for a constant current applied to the interconnect.

One can see that increasing the distance between the vias leads to significant changes in the stress distribution. Particularly, it is remarkable that the stress change under the inner via is more pronounced than the change of stress under the outer via, as shown in Figure 5.34. This behavior is observed for the constant voltage case, as well as for the constant current case. The main consequence of such a behavior is a change in the probable sites of void nucleation. As for small distances the stress magnitudes under both vias are likely to be similar, a void could nucleate in either the outer or innermost via, as already pointed out. However, increasing the distance the stress under the inner via is significantly reduced, which prevents void nucleation at this site. Therefore, it can be expected that a void nucleates only under the outer via.

Figure 5.34: Maximum hydrostatic stress under the outer and inner via as a function of the distance between the vias. The stress for the single via case is given at zero distance between the vias.

These results indicate that the redundant via design offers only a limited ability in improving the interconnect lifetime. When a void nucleates under the inner via, it can grow through the line and span the entire cross section of the line, which interrupts the current flow along the metal. This certainly leads to an undesirable increase of the interconnect resistance and, consequently, interconnect failure. In this case, the redundancy for current flow provided by the outer via cannot help. In turn, a small increase in the distance between the vias allows void nucleation only in the outer via. Thus, even if the void grows and spans the line section, the resistance increase may not be critical, since the inner via still serves as a path for current conduction. This strategy requires, however, a larger metallization area which is not always available.

To sum up, the simulation results suggest that geometric features can have an important impact on the ability of the interconnect to cope with electromigration, and the adequate design of a redundant via structure is crucial to effectively enhance the interconnect reliability regarding electromigration failure.

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Next: 5.6 Effect of Microstructure Up: 5. Simulation Studies of Previous: 5.4 Fast Diffusivity Paths

R. L. de Orio: Electromigration Modeling and Simulation