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Abstract

Simulation of etching and deposition processes as well as three-dimensional geometry generation are important issues in state of the art TCAD applications. Three-dimensional effects are gaining importance for semiconductor devices and for their interconnects. Therefore a strictly physically based simulation of their topography is required. Accurate investigation of single etching and deposition processes has become equally important as process integration. Within this context several aspects of three-dimensional topography simulation have been covered by this thesis and new and interesting results have been achieved in various areas.

The algorithmic core of the cell-based structuring element surface propagation method has been optimized and has been eliminated from its position as factor which predominantly determines the required CPU time. In parallel with investigated optimization techniques and required by various process models, the implementation of the surface normal calculation and the special handling of voids and unconnected parts of the geometry has been completed in three dimensions.

A process-step-based solid modeling tool which incorporates layout data as well as aerial image simulation has been supplied. It can be coupled with the topography simulation and includes simple geometrically based models for CMP and oxidation. In the presented combination, the tool makes use of the design information stored in the layout file, combines it with the manufacturing recipe, and hence is extremely helpful for the automatic generation of three-dimensional structures. Its usefulness has been proven with several interconnect examples.

Regarding topography models, resist development not only turned out to be very helpful for predicting exposed and etched resist profiles within a rigorous lithography simulation, but, by means of benchmark examples, also demonstrated the extraordinary stability of the proposed cellular surface movement algorithm.

With respect to modeling of ballistic transport determined low-pressure processes, the equations for the calculation of local etching and deposition rates have been revised. New extensions like the full relation between angular and radial target emission characteristics and particle distributions resulting at different positions on the wafer have been added, and results from reactor scale simulations have been linked to the feature scale profile evolution. Moreover, a fitting model has been implemented, which reduces the number of parameters for particle distributions, scattering mechanisms, and angular dependent surface interactions.

Concerning diffusion determined high-pressure CVD processes, a continuum transport and reaction model for the first time has been implemented in three dimensions. It comprises a flexible interface for the formulation of the involved process chemistry and derives the local deposition rate from a finite element diffusion calculation carried out on the three-dimensional mesh of the gas domain above the feature. For each time-step of the deposition simulation the mesh is automatically generated as counterpart to the surface of the three-dimensional structure evolving with time. The CVD model has also been coupled with equipment simulations.

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W. Pyka: Feature Scale Modeling for Etching and Deposition Processes in Semiconductor Manufacturing