In the silicon industry, process [31], device
[134], and interconnect-simulation tools form a continuous
row of tools ranging from material analysis, device analysis to
chip design and even system design [293]. Since the
database available for composition dependent III-V semiconductor
modeling has been restricted for a long time, Monte Carlo (MC)
simulation approaches for material analysis have prevailed to
determine a larger number of material properties, especially for
high field transport. The approach of Fischetti and Laux
in [91] with some minor modifications is still
widely used, though full band MC codes are also available
[94,142]. III-V device simulation mainly focuses
on device and circuit aspects [208]. For heterojunction
devices, due to the extensive number of technological process
steps, device simulation mainly is used for inverse modeling and
process control, e.g. of geometry or doping. A common problem is
the lack of a thorough approach to III-V semiconductor materials
modeling. Material modeling of AlGaAs,
InGaAs, InAlAs, and InGaP
is restricted to slight modifications of GaAs or even Si material
properties. Another very severe problem is the limited feedback
from technological state-of-the-art process development to device
simulator development. Table 2.2 gives an overview of
the simulators available.

The device simulator *MEDICI* has been used for the
simulation of AlGaAs/GaAs HBTs [21] and for evaluation
of expected GaN HBTs [224] properties. For the device
simulator *ATLAS* from *SILVACO* [262] the simulation
capability of AlGaAs/GaAs and pseudomorphic AlGaAs/InGaAs/GaAs
HEMTs was announced.
The two-dimensional device
simulator *PISCES* [31] incorporates a set of III-V
models and examples for GaAs-based, AlGaAs/InGaAs, InAlAs/InGaAs
MESFETs and HEMTs. Further AlGaAs/GaAs, InP/InGaAs, and
InGaP/GaAs HBTs are simulated. *G-PISCES*, a development by Gateway
modeling, also demonstrated the simulation of AlGaN/GaN HEMTs
[15].
The two- and three-dimensional device simulator *DESSIS* [134] provides an
extended set of physical models for device simulation. The capabilities to model Si and SiC are
extended by a heterojunction framework to III-V materials [167]. Issues such as extensive
trap modeling are solved.
At quantum level, a one-dimensional
Schrödinger-Poisson solver *POSES* for charge analysis in HEMTs
for process control is offered by Gateway Modeling. In the program
*SIMBA* [220] a link between a one-dimensional
Schrödinger solver and a two-dimensional Poisson solver is
demonstrated. *SIMBA* also provided drift-diffusion transport
simulation of GaN HEMTs [275]. The advance of
device simulation tools further allows precise physics-based
small-signal extraction, where the principal approaches were
summarized in [160].

Using a one-dimensional current equation, quasi-two-dimensional approaches are demonstrated in several publications by the University of Leeds [187]. This computation time effective approach has also been verified against MC simulation for some examples for gate-lengths down to 50 nm [186].

A similar version is called *Fast Blaze* and presented by
*SILVACO*. The quasi two-dimensional approach demonstrated a
software interface between the quasi-two-dimensional device model
and the compact Root large-signal model within the Microwave
Design System (*MDS* and *ADS*). It can be combined with the
Advanced Design System (*ADS*) delivering an interface towards the
microwave circuit simulator. Even extraction with subsequent
multitone excitation calculations are presented [140].
For the large-signal modeling of devices [237] showed
the combination of a harmonic balance simulation and a device
simulation using *PISCES* for a LDMOS device. For distortion
analysis in a MESFET the same approach was used in MESFETs
[244]. The crucial drawback of a physics based
large-signal extraction is related to the typical problems of
compact large-signal models themselves. This particularly
especially the accurate treatment of parasitic elements, e.g.
inductances for multi-finger devices, the thermal problem, which
is generically three-dimensional, and the frequency dispersion
due to the fast traps in III-V semiconductors.

Various other combinations of physical representation have been proposed, such as HBT compact models [269]. The determination of thermal boundary conditions and the verification of temperature distributions are performed in agreement with three-dimensional thermal chip simulations, e.g. [311]. Simplified approaches for thermal modeling can be found in [139]. Introducing thermal modeling within a compact large-signal model, [248] provided a large-signal model for devices used in the course of this work. A global three-dimensional compact model is introduced by Batty et al. in [28].

2001-12-21