3.4 Void Evolution Models

Voids nucleate in the interconnect due to the development of tensile stress, particularly at those locations where the adhesion between the metal layer and the surrounding material is weak. Stable voids nucleate when the stress build-up due to voiding, defined by equation (3.72), becomes critical. Once the void has nucleated, the failure development due to electromigration enters the second phase, namely void evolution. During this phase, voids can grow, migrate, and change shape due to vacancy transport along its surface driven by the electromigration force, the temperature gradient, the vacancy concentration gradient, and the mechanical stress gradient. The void evolution mechanism leads to a significant increase in the interconnect resistance, triggering complete open circuit failure.

The void evolution mechanism is complex, since it is initiated as the result of a competition between growth, shape change, and motion of the voids [3]. Furthermore, vacancy transport may occur along different paths, such as void surfaces, bulk, grain boundary, and metal/passivation layer interfaces [29], influencing the behavior of the void evolution. Various numerical approaches for the simulation of void evolution due to electromigration in interconnect structures have been developed [71,135,62,107,10,61,152,45]. These methods can be divided in two different categories: void surface evolution methodologies, such as sharp interface [71,135,62] and diffuse interface [108,107,10,11] models, and semi-empirical approaches [60,61,152,45,42,43]. Each numerical model focuses on a particular mechanism or on the combination of multiple mechanisms, when it comes to the void evolution. In the following, the three different methods for describing the electromigration void evolution phenomenon in interconnects are presented. The calculation of the change in resistance due to the growing void is obtained from numerical calculations based on the void evolution models.



Subsections

M. Rovitto: Electromigration Reliability Issue in Interconnects for Three-Dimensional Integration Technologies