The model of an IC fabrication technology, as it
has been discussed before, can be used to investigate the impact of
statistical variations of fabrication parameters on the characteristic
device parameters of an integrated
circuit [1,75,77,83,100], as shown in
Figure 2.6. By introducing artificial statistical
variations (standard deviation )
to the input parameters
of this model, we are able to derive the resulting variation margins
of the output quantities (
). However, such an analysis
represents a considerable computational effort since it is necessary
to carry out a large number of model evaluations in order to achieve
representative statistics.