6. Constrained Optimization of Deep-Sub-Micron Devices

Explorative device studies based on the simulation of devices with analytical and sometimes idealized dopant profiles play an increasingly important role in VLSI technology design and optimization. This section describes the application of the VLSI performance metric in a larger scaling experiment which was carried out to

1.

investigate the scaling behavior of a simple MOSFET structure over a wide range of technology and operating parameters, to

2.

compare different optimization criteria such as current drive or delay time based on the optimization results obtained with these criteria, and to

3.

investigate the tradeoff between power efficiency and speed based on various optimization criteria.