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A.1.3.2 Spurious Effects in Sub-Micron MOSFETs

At higher supply voltage the source/drain extensions are made with a lesser dopant concentration (lightly doped drain, LDD) to limit the maximum electric field in the vicinity of the drain. Otherwise hot-carrier effects (HCE) would continually degrade the device. If the LDD doping is too small for a given \ensuremath{V_{\mathit{DD}}} an inversion channel can form for $\ensuremath{V_{\mathit{GS}}}\xspace =0$ and $\ensuremath{V_{\mathit{DS}}}\xspace = \ensuremath{V_{\mathit{DD}}}\xspace $ (quite similar to the inversion channel, but with reversed signs) and the high electric field can cause a tunneling leakage current from drain to bulk, i.e., gate-induced drain leakage (GIDL). Another consequence of high voltages is the time-dependent dielectric breakdown (TDDB) of the gate oxide, which becomes critical when the electric field in the oxide exceeds $\rm 6MV/cm$

As the distance between source and drain is reduced the potential barrier at $\ensuremath{V_{\mathit{GS}}}\xspace =0$ between them starts to decrease, which can be observed as a decrease of the (somehow measured) threshold voltage (see Section E.1 and Fig. E.3), a so-called short-channel effect (SCE). When the drain voltage is increased the depletion zone around the drain increases and the electric field from the drain reduces the potential barrier even further, which can be observed as an increased drain-voltage dependent off-state current and as an increased output conductance in strong inversion. This effect is called DIBL (drain-induced barrier lowering). Both SCE and DIBL are among the main obstacles to technology scaling. One way to reduce these effects is to introduce some halo doping (the p+ regions in the vicinity of the gate edges) which shapes the electrostatic potential in such a way, that the channel-length dependence of \ensuremath{V_{\mathit{T}}} and \ensuremath{I_{\mathit{off}}} is reduced or even reversed in some range of \ensuremath {L}.

Another group of phenomena affects the drivability directly. The first one is velocity saturation, i.e., at large electric field the drift velocity of carriers is no longer proportional to the field but saturates at some saturation velocity \ensuremath{v_{\mathit{sat}}} which is about $\rm 10^7cm/s$ for electrons at a field of about $\rm 10^5V/cm$. The second effect is a degradation of the effective mobility $\mu$ at a large transversal field at the interface, i.e., for large $\ensuremath{V_{\mathit{G}}}\xspace -\ensuremath{V_{\mathit{T}}}\xspace $ (the actual origin of this effect is somewhat unclear and may also be linked to quantization phenomena in the channel [80]). As a consequence of both of these phenomena, at higher supply voltages the relative improvement of drivability and speed with voltage is much lower than for small \ensuremath{V_{\mathit{DD}}}.


next up previous contents
Next: A.2 Digital Circuits Up: A.1.3 The Concrete MOSFET Previous: A.1.3.1 Sub-Micron MOSFET Structures

G. Schrom