Own Publications

Publications in Journals

J01

W. Wessner, J. Cervenka, C. Heitzinger, A. Hössinger, and S. Selberherr ``Anisotropic Mesh Refinement for the Simulation of Three-Dimensional Semiconductor Manufacturing Processes'', IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 25, no. 10, pp. 2129 - 2139, 2006.

J02

J. Cervenka, W. Wessner, E. Al-Ani, T. Grasser, and Selberherr S. ``Generation of Unstructured Meshes for Process and Device Simulation by Means od Partial Differential Equations'', IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 25, no. 10, pp. 2118 - 2128, 2006.

Contributions to Books

B01

G. Karlowatz, E. Ungersböck, W. Wessner, H. Kosina, and S. Selberherr ''Analysis of Hole Transport in Arbitrarily Strained Germanium'' in SiGe and Ge: Materials, Processing, and Devices, D. Harame, et al. (Eds.), ser. ECS Transactions, vol. 3, no. 7, The Electrochemical Society, 2006, ISBN: 1-56677-507-8, pp. 443 - 450.

Invited Talks

T01

W. Wessner, H. Ceric, Ch. Hollauer, E. Langer, and S. Selberherr: ''Electromigration Reliability TCAD Solutions'' Presentation: SEMICON Europa 2005, (Munich), invited, 2005.

Publications in Conference Proceedings

C01

G. Karlowatz, E. Ungersböck, W. Wessner, H. Kosina, and S. Selberherr: ''Analysis of Hole Transport in Arbitrarily Strained Germanium'' in Proc. Meeting Abstracts: 210$^{th}$ Meeting of The Electrochemical Society, (Cancun), p. 1449, 2006, (CD-rom).

C02

G. Karlowatz, E. Ungersböck, W. Wessner, and H. Kosina: ''Full-Band Monte Carlo Analysis of Electron Transport in Arbitrary Strained Silicon'' in Proc. International Conference of Simulation of Semiconductor Processes and Devices 2006, (Monterey), pp. 63 - 66, 2006.

C03

G. Karlowatz, W. Wessner, and H. Kosina: ``Effect of Band Structure Discretization on the Performance of Full-Band Monte Carlo Simulation'' in $5^{th}$ Mathmod Vienna Proceedings, (Vienna), pp. 4-1 - 4-6, 2006.

C04

A. Nentschev, R. Sabelka, W. Wessner, and S. Selberherr: ''On Chip Interconnect Simulation of Parasitic Capacitances in Periodic Structures'' in The 2005 European Simulation and Modelling Conference Proceedings, (Porto), pp. 420 - 424, 2005.

C05

W. Wessner, H. Ceric, J. Cervenka, and S. Selberherr: ``Dynamic Mesh Adaptation for Three-Dimensional Elektromigration Simulation'' in Proc. International Conference on Simulation of Semiconductor Processes and Devices 2005, (Tokyo), pp. 147 - 150, 2005.

C06

W. Wessner, S. Wagner, T. Grasser, and S. Selberherr: ``Meshing Aspects on Three-Dimensional Fin-Fet Device Simulations,'' in Proc. Asia Pacific Microwave Conference (APMC), (New Delhi), 2004, (CD-rom).

C07

H. Ceric, R. Sabelka, S. Holzer, W. Wessner, S. Wagner, T. Grasser, and S. Selberherr: ``The Evolution of the Resistance and Current Density During Electromigration,'' in Proc. Simulation of Semiconductor Processes and Devices, (Munich), pp. 331 - 334, 2004.

C08

W. Wessner, Ch. Hollauer, A. Hössinger, and S. Selberherr: ''Anisotropic Laplace Refinement for Three-Dimensional Oxidation Simulation'' in Proc. Simulation of Semiconductor Processes and Devices 2004, (Munich), pp. 165 - 168, 2004.

C09

W. Wessner, H. Ceric, C. Heitzinger, A. Hössinger, and S. Selberherr: ''Anisotropic Mesh Adaption Governed by a Hessian Matrix Metric'' in Proc. Simulation in Industry, 15th European Simulation Symposium, (Delft), pp. 41 - 46, 2003.

C10

W. Wessner, A. Hössinger, and S. Selberherr: ''Anisotropic Mesh Refinement for Three-Dimensional Diffusion Simulation'' in Beiträge der Informationstagung Mikroelektronik 2003, (Vienna), pp. 523 - 528, 2003.

C11

W. Wessner, C. Heitzinger, A. Hössinger, and S. Selberherr: ''Error Estimated Driven Anisotropic Mesh Refinement for Three-Dimensional Diffusion Simulation'' in Proc. IEEE International Conference on Simulation of Semiconductor Processes and Devices, (Boston), pp. 109 - 112, 2003.

Diploma Thesis

D01

W. Wessner: ``Jump and Walk - Ein Punkt-Lokalisierungs-Algorithmus für Komplexe Dreidimensionale Tetraeder-Gitter-Strukturen''; Supervisor: E. Langer, and T. Binder; Institut für Mikroelektronik, Technische Universität Wien, 2002.