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Next: CONCLUSION AND OUTLOOK Up: No Title Previous: MATHEMATICAL MODELS

APPLICATIONS AND RESULTS

Fig. 1 shows a typical layout design achieved from conventional ECAD tools and the the dashed marked region of interest which is used for further capacitance investigations. After several planar deposition steps the three dimensional planar five conductor structure (Fig. 2) is obtained which is embedded in a $\mathrm{SiO}_2$ Oxide and has a overall thickness of 10$\mu$m.

For performance investigations this basic grid has been refined in lateral and vertical direction to measure the time and memory consumption of our simulation tool in dependence of the grid points (Fig. 3). The implementation of the preconditioned CG solver in combination with the sparsely occupied stiffness matrix results in a nearly linear behavior of the time consumption. The linear dependency of the required memory is possible because of the usage of the MSCR data format for storing the quadratic stiffness matrix.


 
Figure 1: Layout editor
\begin{figure}\centerline{\epsfig {figure=ped4layer_sel.eps,width=8cm} }\par\end{figure}


 
Figure 2: Coarse meshed conductor geometry
\begin{figure}\centerline{\epsfig {figure=2levcont.eps,width=8cm} } \end{figure}


 
Figure 3: Time and memory consumption for extraction of capacitances of a structure (Fig. 2) have been analysed on a DEC 3000/400 system.
\begin{figure}{\centerline{\epsfig {figure=timemem.eps,width=7.5cm} }} \end{figure}

The layout of two crossing interconnects using design rules for a 0.25$\mu$m technology (Fig. 5) and non-planar deposition steps with typical process parameters (Fig. 4) have been used to obtain the conductor structure shown in Fig. 6 for thermal investigations. The temperature of the environment, i.e. on top and at the bottom of the simulation domain, is assumed to be 320K. In vertical directions we defined homogeneous Neumann boundary conditions. Fig. 7 shows the calculated temperature distribution for a constant current of 50mA through the Al-lines. The temperature distribution is symmetric. The maximum temperature of 598K occurs in the upper metal line. This results from the larger gap between the upper metal line and the top plane as compared to the lower line and the top of the Substrate (1$\mu$m vs. 0.6$\mu$m cf. Fig. 4).


 
Figure 4: Planar cross-section in [$\mu$m].
\begin{figure}\centerline{\epsfig {figure=viaquer.eps,height=6cm} } \end{figure}


 
Figure 5: Layout design.
\begin{figure}\centerline{\epsfig {figure=vialayout.eps,height=5.8cm} } \end{figure}


 
Figure 6: Three-dimensional modeled non-planar conductor structures after triangulation.
\begin{figure}\centerline{\epsfig {figure=viageometry.eps,width=0.8\textwidth} } \end{figure}


 
Figure 7: Temperature distribution.
\begin{figure}\centerline{\epsfig {figure=viathermonres.ps,width=0.99\textwidth} } \end{figure}

next up previous
Next: CONCLUSION AND OUTLOOK Up: No Title Previous: MATHEMATICAL MODELS
Rainer Sabelka
1998-01-30