Analyses in the preceding sections, carried out on MOS capacitors, have provided most relevant information regarding the gate-depletion effect. In this section we focus on the gate-depletion problem in MOSFETs. This effect has been implemented in our numerical simulator by adopting different approaches. A simple analytical model for the degradation of the effective gate bias due to gate depletion is presented. The analytical model and numerical simulations are employed to evaluate the impact of gate depletion on further scaling of MOSFETs.