6.3.1 Used Samples and Stress Conditions

pMOSFETs from a standard 90nm  CMOS process with plasma-nitrided oxide (around 6%  of nitrogen) were used. Two thin oxide devices (tox = 1.8nm, 2.2nm  ) with geometry W ∕L = 10μm ∕0.12μm  and one thicker oxide device (tox = 5nm  ) with W ∕L = 10μm ∕0.24μm  were used. The devices were stressed with gate voltages V
  G,str   of − 1.75V  , − 2.00V  , − 2.25V  , and − 2.50V  at temperatures of    ∘
25 C  ,   ∘
75 C  ,    ∘
125 C  , and    ∘
175 C  .