A full adder adds three binary inputs (, , and ) and has two outputs, sum () and carry () given by

s = a_{1 } XOR a_{2} XOR c_{in} | (A.1) |

c_{out} | = (a_{1} AND a_{2}) OR (c_{in} AND [a_{1} XOR a_{2}]) | ||

≡ (a_{1} AND a_{2}) OR (c_{in} AND [a_{1} OR a_{2}]). | (A.2) |

In implication-based logic systems the realized logic operation is equivalent to the operation IMP or NIMP depending on the logical definitions for the high and low resistance states as explained in Table 3.2). Here the detailed implementations of a stateful full adder using the MRAM implication logic arrays are presented.

0 | 0 | 0 | 0 | 0 |

0 | 0 | 1 | 1 | 0 |

0 | 1 | 0 | 1 | 0 |

0 | 1 | 1 | 0 | 1 |

1 | 0 | 0 | 1 | 0 |

1 | 0 | 1 | 0 | 1 |

1 | 1 | 0 | 0 | 1 |

1 | 1 | 1 | 1 | 1 |