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5.4 SPICE Modeling Interface

The SPICE modeling interface is implemented (as outlined in Chapter 4 in Section 4.2.4) analogously to the typical approach how SPICE models are generated. Simulated characteristics of a high-voltage PMOS device used as a driver inside a EEPROM process technology together with the fitted SPICE model are shown in Figure 5.4. The most important characteristics necessary for generating a SPICE model (transfer characteristics and output characteristics as a function of the terminal voltages at gate, drain and substrate) are shown. The crosses denote the simulated current values and the solid lines denote the fitted SPICE model. From this graph it can be clearly seen that simulation results obtained from device simulations can be used as if they were measured results. The SPICE models obtained by this method have been as stable in circuit simulation as the measurement based ones.
With this method the circuit designers are able to start the design of an integrated circuit based on a process technology in development much earlier than with the conventional approach. The additional effort of generating SPICE models twice (first the TCAD based models and second the measurement based models when silicon material is available) is justified by the time gained during the design of the first product. Having a integrated circuit prototype ready early in the semiconductor process ramp-up phase is inevitable to introduce and stabilize new process technologies into the semiconductor manufacturing line. Furthermore, the manufacturability of a new process technology can be evaluated and improved already during the early development phase. Integration problems can be screened out much earlier thus reducing the development risk significantly.

Figure 5.4: Transfer (a), output (b), transconductance (c) and conductance (d) characteristics of a high voltage PMOS driver transistor at different substrate and gate voltages respectively. TCAD simulations are compared to the results of the fitted SPICE model
\includegraphics[origin=c,width=1.0\textwidth,clip=true]{figures/tcad_pmoseh_transfer.rot.ps}
(a)
\includegraphics[origin=c,width=1.0\textwidth,clip=true]{figures/tcad_pmoseh_gm.rot.ps}
(b)

\includegraphics[origin=c,width=1.0\textwidth,clip=true]{figures/tcad_pmoseh_output.rot.ps}
(c)
\includegraphics[origin=c,width=1.0\textwidth,clip=true]{figures/tcad_pmoseh_gds.rot.ps}
(d)


next up previous contents
Next: 6. Industrial Application of Up: 5. Implementation Previous: 5.3 Electrical Test Interface

R. Minixhofer: Integrating Technology Simulation into the Semiconductor Manufacturing Environment