Table 9.4 gives the parameters found by the procedure shown in Figure 9.9, Figure 9.11 depicts the threshold-voltage vs. gate-length characteristic for the optimum device.
Table 9.4:
Optimum implantation parameters for pocket implants.
For comparison with the nominal device,
Figure 9.12 shows the LDD, source/drain, and threshold-adjust
implants around the gate edge (at 
) of the 
NMOS device, looking from the surface into the bulk.
The (n-type) LDD doping
compensates the (p-type) threshold-adjust implant inside the
channel region and causes a reduction of the effective channel length.
Figure 9.13 shows the channel region around the gate
edge with a pocket implant, using the parameters established by the
optimization procedure. In the critical region between
and 
, the threshold-adjust implant is
enhanced by the pocket implant; the total p-type
doping is high enough to compensate the influence of the LDD and
source/drain implants around the gate edge.
Figure 9.12:
Short-channel device doping profile without pocket implants.
Figure 9.13:
Short-channel device doping profile with pocket implants.
In many cases, an optimization task gets stuck in a local minimum and does not reach the global optimum. Starting the optimizer at different initial points is a helpful strategy to find the global optimum. Taking advantage of VISTA/SFC's task-level programming facilities, the dependence of the optimization result on the choice of initial values for the optimization problem can be easily investigated by specifying the optimization problem itself as en EVE object and submitting it to a set of experiments. Figure 9.14 shows the list of statements used for running the optimization task for three values for each of the optimization variables, generating a total of nine optimization runs that are executed in parallel by VISTA/SFC.
