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Next: 5.4.4 Technology D: Pseudomorphic high-power Up: 5.4 Technologies Under Investigation Previous: 5.4.2 Technology B: Pseudomorphic high-power

5.4.3 Technology C: Pseudomorphic HEMT on GaAs

Technology C is based on multi layer resist electron (e-) beam lithography for gate definition. An ICP dry etch process defines the gate recess. The HEMT examples were processed on 3 and 4 inch GaAs wafers. Typical gate lengths are $ {\it l}_{\mathrm{g}}$= 150 nm using a Ti/Pt/Au gate metal. An implant isolation renders the process planar.