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5.1 Operational Amplifiers

To achieve an appropriate voltage gain almost all devices of ULV OPAMPs are operated in weak to moderate inversion (cf. (2.11)). An upper bound for the voltage gain of a single transistor loaded with an ideal current source can be derived as

\begin{displaymath}
\ensuremath{A_{\mathit{max}}}\xspace = \frac{1}{n} \left({e...
...}}\xspace }{\ensuremath{U_{\mathit{T}}}\xspace }}} -1 \right).
\end{displaymath} (5.1)

This means that the gain is mainly determined by the available voltage drop $\ensuremath{V_{\mathit{DS}}}\xspace $ of the amplifying devices. Another limit to the gain originates from the (bipolar) Early effect of sub-micron devices: $A \le \ensuremath{V_{\mathit{A}}}\xspace /{n\ensuremath{U_{\mathit{T}}}\xspace }$. Cascoding can reduce the Early conductance of sub-micron devices, but it also decreases the available $\ensuremath{V_{\mathit{DS}}}\xspace $. For the 0.5V process an improvement was found only for $\ensuremath{V_{\mathit{DS}}}\xspace > \rm 300mV$, i.e., $\ensuremath{V_{\mathit{DD}}}\xspace > \rm 600mV$.

Figure 5.1 shows the simulated large-signal step response of a two-stage OPAMP operating as a follower at $\ensuremath{V_{\mathit{DD}}}\xspace =\rm0.4V$ for two different loads. The frequency compensation is accomplished by wider output transistors (M7, M8), utilizing their internal capacitances rather than a separate capacitor (C1). The OPAMP is biased for medium speed, consuming a total of $\rm 4.0\mu W$. Results from OTA simulations are shown in Fig. 5.5 indicating that cascoding is useful for $\ensuremath{V_{\mathit{DD}}}\xspace >0.6V$. This is also confirmed by the simulation of different current mirrors in a 0.5V-technology as shown in Fig. 5.4. The only way to increase the gain of a single device in a given technology is to increase the gate length at the expense of lower speed. Figure 5.6 shows the achievable maximum voltage gain of two-stage OPAMPs . Voltage gains of more than 60dB are possible at 0.5V and more than 38dB at 0.2V, which indicates that $\ensuremath{V_{\mathit{DD}}}\xspace =0.5\rm V$ could be a practical value for low-voltage mixed-analog-digital applications.

Figure 5.1: Large-signal step response of a two-stage ULP OPAMP with a self-compensating output stage operating as a follower at $\ensuremath{V_{\mathit{DD}}}\xspace =\rm0.4V$ with (a) $\ensuremath{C_{\mathit{L}}}\xspace =\rm 0pF$ and (b) $\ensuremath{C_{\mathit{L}}}\xspace =\rm 1pF$
\includegraphics[scale=1.0]{op-x-f.ps}
\includegraphics[scale=1.0]{op-x-f.eps}

Figure 5.2: Simple OTA
\includegraphics[scale=1.0]{ota-5.ps}

Figure 5.3: Folded-cascode OTA
\includegraphics[scale=1.0]{cascop.ps}

Figure 5.4: Output conductance of current mirrors (0.5V technology) as a function of the output voltage (simple (a), cascoded (b), and double \ensuremath {L} (c))
\includegraphics[scale=1.0]{curmir.eps}

Figure 5.5: Voltage gain of a simple OTA and a folded-cascode OTA (0.5V technology), operating at $\ensuremath{V_{\mathit{DD}}}\xspace =\rm 0.6V$ as a function of the output voltage
\includegraphics[scale=1.0]{casc.eps}

Figure 5.6: Voltage gain vs. $\ensuremath{V_{\mathit{out}}}\xspace $ and maximum voltage gain vs. $\ensuremath{V_{\mathit{DD}}}\xspace $ of two-stage ULV OPAMPs operating at $\ensuremath{V_{\mathit{DD}}}\xspace =\rm0.4V$ as a function of the output voltage (0.2V technology (a) and 0.5V technology (b))
\includegraphics[scale=1.0]{a-sd.eps}
\includegraphics[scale=1.0]{a-vdd.eps}


next up previous contents
Next: 5.2 Switched-Capacitor Circuits Up: 5. ULP-Compatible Mixed Analog Previous: 5. ULP-Compatible Mixed Analog

G. Schrom