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Next: 5.3.3 DACs Up: 5.3 Low-Voltage Analog Digital Previous: 5.3.1 First-Order Sigma-Delta Converters

5.3.2 Second-Order Sigma-Delta Converters

One possibility to improve the SNR is to increase the order of the noise shaping filter. Simulation results of second-oder loops (cf. Fig. B.2) are shown in Figs. 5.16-5.18.

Ideally, the SNR would be improved to 15dB/octave but the SNR was improved only to 39dB (as against the ideal value of 84dB). One reason is the reduction of the input signal range. The input signal used in Fig. 5.17 has the maximum theoretically possible amplitude (and yet smaller than that of the first-order converters), which causes already significant harmonic distortions (4.1%). Another reason can be seen in the spectrum of the same unfiltered output signal shown in Fig. 5.18: Ideally, the slope of the (shaped) noise power spectral density should be 12dB/octave. However, there is also a component with a slope of 6dB/octave and a constant one. The 6dB/octave component originates from the error signal at the second integrator input (cf. e1 in Fig. B.4 and E1 in (B.8) respectively) and is noise-shaped by the first integrator. The white component is the same as in the first-order case. It should be noted, however, that these two noise components increase with the input signal amplitude, so that the in-band noise at zero input is generally much smaller. This means that the dynamic range - in this case 69dB - is larger than the SNR.

Further analysis of the internal node voltages shows that margin for the output voltage of the second integrator is limited by the supply voltage but it also by threshold voltage and transistor width variations or unsymmetries. The use of transistors with longer channels for the integrators in combination with well biasing to obtain a symmetric transfer characteristic could be used to operate second-order converters at 0.2V (albeit at a lower oversampling frequency).

Figure 5.15: Output spectrum of a low-voltage first-order sigma-delta ADC with dithering operating at $\ensuremath{V_{\mathit{DD}}}\xspace =0.2V$, $\ensuremath{f_{\mathit{os}}}\xspace =\rm 100MHz$ (input: $f=\rm 100kHz$, $100\rm mV_{\mathit{pp}}$)
\includegraphics[scale=1.0]{sdc-1d.eps}

Figure 5.16: Output spectrum of a low-voltage second-order sigma-delta ADC operating at $\ensuremath{V_{\mathit{DD}}}\xspace =0.2V$, $\ensuremath{f_{\mathit{os}}}\xspace =\rm 100MHz$
\includegraphics[scale=1.0]{sdc-2x.eps}

Figure 5.17: Output spectrum of a low-voltage second-order sigma-delta ADC with distortions from the first integrator
\includegraphics[scale=1.0]{sdc-2y.eps}

Figure 5.18: Noise and distortions in a low-voltage second-order sigma-delta ADC operating at $\ensuremath{V_{\mathit{DD}}}\xspace =0.2V$, $\ensuremath{f_{\mathit{os}}}\xspace =\rm 100MHz$
\includegraphics[scale=1.0]{sdc-2yl.eps}


next up previous contents
Next: 5.3.3 DACs Up: 5.3 Low-Voltage Analog Digital Previous: 5.3.1 First-Order Sigma-Delta Converters

G. Schrom