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2.4 Hot Carrier Effects

If a MOS transistor is operated under pinch-off condition, also known as ``saturated case'', hot carriers traveling with saturation velocity can cause parasitic effects at the drain side of the channel known as ``Hot Carrier Effects'' (HCE). These carriers have sufficient energy to generate electron-hole pairs by Impact Ionization (II) (Fig. 2.8). The generated bulk minority carriers can either be collected by the drain or injected into the gate oxide. The generated majority carriers create a bulk current which can be used as a measurable quantity to determine the level of impact ionization [74].

Figure 2.8: Impact ionization rate in units (s$^{-1}$cm$^{-3}$) of Device $\beta $ in the on-state.
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\psfrag{x [um]} [ct][cb]{$x$\ ($\mu$m)}
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...3mm}
\includegraphics[height=\textwidth,angle=90]{../figures/phenomena-II.eps}}

Carrier injection into the gate oxide can lead to hot carrier degradation effects such as threshold voltage changes due to occupied traps in the oxide. Hot carriers can also generate traps at the silicon-oxide interface known as ``fast surface states'' leading to subthreshold swing deterioration and stress-induced drain leakage [68]. In general, these degradation effects set a limit to the lifetime of a transistor, therefore they have to be controlled as well as possible.

Bulk currents are comparatively unimportant as long as the parasitic series resistance of the bulk does not establish a drastically increased bulk potential which can lead to threshold voltage reduction or even more serious effects like snap-back or latch-up [73].

The energy of the hot carriers depends mainly on the electric field in the pinch-off region (Fig. 2.9). Since, in the past, the scaling of supply voltage has not been as aggressive as the device geometry scaling, the electric field has been permanently rising. Alternative device structures such as the Lightly Doped Drain (LDD) which was first published in [41] and then widely used, or Graded Channel (GC) structures [34] helped to reduce the drain electric field while maintaining a high supply voltage.


next up previous contents
Next: 2.5 Gate Leakage Up: 2. ULSI MOS Device Previous: 2.3 Drain-Induced Barrier Lowering
Michael Stockinger
2000-01-05